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Message-ID: <tip-0f363b250b15af0f218bb2876d101fe5cd413f8b@git.kernel.org>
Date:	Fri, 9 Jan 2015 04:31:46 -0800
From:	tip-bot for Peter Zijlstra <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	mingo@...nel.org, dave.hansen@...ux.intel.com, acme@...hat.com,
	torvalds@...ux-foundation.org, jolsa@...hat.com,
	eranian@...gle.com, jkenisto@...ibm.com,
	linux-kernel@...r.kernel.org, kan.liang@...el.com,
	masami.hiramatsu.pt@...achi.com, tglx@...utronix.de,
	ak@...ux.intel.com, peterz@...radead.org, hpa@...or.com
Subject: [tip:perf/urgent] x86: Fix off-by-one in instruction decoder

Commit-ID:  0f363b250b15af0f218bb2876d101fe5cd413f8b
Gitweb:     http://git.kernel.org/tip/0f363b250b15af0f218bb2876d101fe5cd413f8b
Author:     Peter Zijlstra <peterz@...radead.org>
AuthorDate: Tue, 16 Dec 2014 11:46:14 +0100
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Fri, 9 Jan 2015 11:12:26 +0100

x86: Fix off-by-one in instruction decoder

Stephane reported that the PEBS fixup was broken by the recent commit to
the instruction decoder. The thing had an off-by-one which resulted in
not being able to decode the last instruction and always bail.

Reported-by: Stephane Eranian <eranian@...gle.com>
Fixes: 6ba48ff46f76 ("x86: Remove arbitrary instruction size limit in instruction decoder")
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: stable@...r.kernel.org # 3.18
Cc: <ak@...ux.intel.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Liang Kan <kan.liang@...el.com>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: Jim Keniston <jkenisto@...ibm.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>
Link: http://lkml.kernel.org/r/20141216104614.GV3337@twins.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/lib/insn.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/lib/insn.c b/arch/x86/lib/insn.c
index 2480978..1313ae6 100644
--- a/arch/x86/lib/insn.c
+++ b/arch/x86/lib/insn.c
@@ -28,7 +28,7 @@
 
 /* Verify next sizeof(t) bytes can be on the same instruction */
 #define validate_next(t, insn, n)	\
-	((insn)->next_byte + sizeof(t) + n < (insn)->end_kaddr)
+	((insn)->next_byte + sizeof(t) + n <= (insn)->end_kaddr)
 
 #define __get_next(t, insn)	\
 	({ t r = *(t*)insn->next_byte; insn->next_byte += sizeof(t); r; })
--
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