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Message-ID: <CACRpkdaWBuMkLkO_Mh5-a+hCSSnpYj1nW2EL8bFD1_jPF=gL6A@mail.gmail.com>
Date:	Mon, 12 Jan 2015 00:57:42 +0100
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Chang Rebecca Swee Fun <rebecca.swee.fun.chang@...el.com>
Cc:	Mika Westerberg <mika.westerberg@...el.com>,
	Alexandre Courbot <gnurou@...il.com>,
	GPIO Subsystem Mailing List <linux-gpio@...r.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Denis Turischev <denis.turischev@...pulab.co.il>
Subject: Re: [PATCHv5 2/2] gpio: sch: Add support for Intel Quark X1000 SoC

On Mon, Dec 8, 2014 at 10:38 AM, Chang Rebecca Swee Fun
<rebecca.swee.fun.chang@...el.com> wrote:

> Intel Quark X1000 provides a total of 16 GPIOs. The GPIOs are split between
> the legacy I/O bridge and the GPIO controller.
>
> GPIO-SCH is the GPIO pins on legacy bridge for Intel Quark SoC.
> Intel Quark X1000 has 2 GPIOs powered by the core power well and 6 from
> the suspend power well.
>
> This piece of work is derived from Dan O'Donovan's initial work for Quark
> X1000 enabling.
>
> Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@...el.com>
> Reviewed-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
> Reviewed-by: Alexandre Courbot <acourbot@...dia.com>

Patch applied.

Yours,
Linus Walleij
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