linux-kernel - [PATCH V2 1/1] perf, x86: bug fix for cycles:p and cycles:pp on SLM

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Message-Id: <1421084541-31639-1-git-send-email-kan.liang@intel.com>
Date:	Mon, 12 Jan 2015 17:42:21 +0000
From:	kan.liang@...el.com
To:	a.p.zijlstra@...llo.nl
Cc:	linux-kernel@...r.kernel.org, ak@...ux.intel.com,
	Kan Liang <kan.liang@...el.com>
Subject: [PATCH V2 1/1] perf, x86: bug fix for cycles:p and cycles:pp on SLM

From: Kan Liang <kan.liang@...el.com>

cycles:p and cycles:pp do not work on SLM since
86a04461a99f ("perf/x86: Revamp PEBS event selection")

UOPS_RETIRED.ALL is not a PEBS capable event, so it should not be used
to count cycle number.
Actually SLM call intel_pebs_aliases_core2 which uses INST_RETIRED.ANY_P
counts the number of cycles. It's a PEBS capable event. But inv and
cmask must be set to count cycles.
Considering SLM allows all events as PEBS with no flags, here only
INST_RETIRED.ANY_P, inv=1, cmask=16 need to specially handled.

Signed-off-by: Kan Liang <kan.liang@...el.com>
---
Changes since V1
 - Only handle INST_RETIRED.ANY_P, inv=1, cmask=16

 arch/x86/kernel/cpu/perf_event_intel_ds.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 3c895d4..0739833 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -568,8 +568,8 @@ struct event_constraint intel_atom_pebs_event_constraints[] = {
 };
 
 struct event_constraint intel_slm_pebs_event_constraints[] = {
-	/* UOPS_RETIRED.ALL, inv=1, cmask=16 (cycles:p). */
-	INTEL_FLAGS_EVENT_CONSTRAINT(0x108001c2, 0xf),
+	/* INST_RETIRED.ANY_P, inv=1, cmask=16 (cycles:p). */
+	INTEL_FLAGS_EVENT_CONSTRAINT(0x108000c0, 0x1),
 	/* Allow all events as PEBS with no flags */
 	INTEL_ALL_EVENT_CONSTRAINT(0, 0x1),
 	EVENT_CONSTRAINT_END
-- 
1.7.11.7

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