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Message-ID: <20150112180608.GA11295@obsidianresearch.com>
Date: Mon, 12 Jan 2015 11:06:08 -0700
From: Jason Gunthorpe <jgunthorpe@...idianresearch.com>
To: atull <atull@...nsource.altera.com>
Cc: Pavel Machek <pavel@...x.de>,
Pantelis Antoniou <pantelis.antoniou@...sulko.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>, hpa@...or.com,
Michal Simek <monstr@...str.eu>,
Michal Simek <michal.simek@...inx.com>, rdunlap@...radead.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
devicetree@...r.kernel.org, robh+dt@...nel.org,
Grant Likely <grant.likely@...aro.org>, iws@...o.caltech.edu,
linux-doc@...r.kernel.org, Mark Brown <broonie@...nel.org>,
philip@...ister.org, rubini@...dd.com,
Steffen Trumtrar <s.trumtrar@...gutronix.de>,
jason@...edaemon.net, kyle.teske@...com, nico@...aro.org,
Felipe Balbi <balbi@...com>, m.chehab@...sung.com,
davidb@...eaurora.org, Rob Landley <rob@...dley.net>,
davem@...emloft.net, cesarb@...arb.net, sameo@...ux.intel.com,
akpm@...ux-foundation.org,
Linus Walleij <linus.walleij@...aro.org>, pawel.moll@....com,
mark.rutland@....com, ijc+devicetree@...lion.org.uk,
galak@...eaurora.org, devel@...verdev.osuosl.org,
Alan Tull <delicious.quinoa@...il.com>,
dinguyen@...nsource.altera.com, yvanderv@...nsource.altera.com
Subject: Re: [PATCH v8 2/4] fpga manager: add sysfs interface document
On Sun, Jan 11, 2015 at 10:29:00AM -0600, atull wrote:
> the FPGA image. If someone wants there to be only one FPGA image on
> the FGPA forever, they will probably not be using this framework; their
> FPGA will probably be loaded before Linux boots up.
Nonsense, loading the FPGA through Linux is much better, it avoids
having to deal with this complexity in the boot loader and means that
Linux can be used to locate the huge image in some kind of sensible
filesystem, log failures, do any FPGA startup sequence/etc.
With hotplug and DT I find this this works very well. The FPGA devices
simply are not registered with the kernel until userspace gives the OK
(in future a DT overload can handle this)
If you keep with the notion that the DT overload specifies the
matching FPGA firmware then it makes alot more sense to me to use DT
overlays as the API to change the file name - not sysfs.
To reload a FPGA, unload the DT overlay (this would have to disconnect
all the drivers), de-program the FPGA, the load a new DT overlay,
which reprograms and re-binds the new drivers. All those steps have to
be done anyhow, you can't just swap the HW while drivers are attached.
.. and if there are no drivers then Alan is right, this is the wrong
interface for the 'FPGA as a user space co-processor' model.
I would also re-iterate my earlier comments: requiring the whole FPGA
image to be held in ram makes this useless for any of my applications.
Jason
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