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Message-id: <823139081.971381421140443531.JavaMail.weblogic@epmlwas05d>
Date: Tue, 13 Jan 2015 09:14:06 +0000 (GMT)
From: MyungJoo Ham <myungjoo.ham@...sung.com>
To: 최찬우 <cw00.choi@...sung.com>,
"kgene@...nel.org" <kgene@...nel.org>
Cc: 박경민 <kyungmin.park@...sung.com>,
"rafael.j.wysocki@...el.com" <rafael.j.wysocki@...el.com>,
"mark.rutland@....com" <mark.rutland@....com>,
ABHILASH KESAVAN <a.kesavan@...sung.com>,
"tomasz.figa@...il.com" <tomasz.figa@...il.com>,
Krzysztof Kozlowski <k.kozlowski@...sung.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
대인기 <inki.dae@...sung.com>,
"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-samsung-soc@...r.kernel.org"
<linux-samsung-soc@...r.kernel.org>
Subject: Re: [PATCHv3 3/8] ARM: dts: Add memory bus node for Exynos3250
>
> This patch adds the memory bus node for Exynos3250 SoC. Exynos3250 has
> following memory buses to translate data between DRAM and eMMC/sub-IPs.
>
> Following list specifies the detailed relation between memory bus clock and DMC
> IP in MIF (Memory Interface) block:
> - DMC clock : DMC (Dynamic Memory Controller)
>
> Following list specifies the detailed relation between memory bus clock and
> sub-IPs in INT (Internal) block:
> - ACLK100 clock : PERIL
> - ACLK160 clock : LCD0
> - ACLK200 clock : FSYS
> - ACLK266 clock : ISP
> - GDL/GDR clock : leftbus/rightbus
> - SCLK_MFC clock : MFC
>
> Cc: Kukjin Kim <kgene@...nel.org>
> Cc: Myungjoo Ham <myungjoo.ham@...sung.com>
> Cc: Kyungmin Park <kyungmin.park@...sung.com>
> Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
> Acked-by: Kyungmin Park <kyungmin.park@...sung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@...sung.com>
> ---
> arch/arm/boot/dts/exynos3250.dtsi | 125 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 125 insertions(+)
>
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