linux-kernel - Re: [V6,1/9] elf: Add new powerpc specifc core note sections

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Message-ID: <54B5F410.2030002@linux.vnet.ibm.com>
Date:	Wed, 14 Jan 2015 10:14:00 +0530
From:	Anshuman Khandual <khandual@...ux.vnet.ibm.com>
To:	Edjunior Barbosa Machado <emachado@...ux.vnet.ibm.com>,
	Michael Ellerman <mpe@...erman.id.au>,
	linux-kernel@...r.kernel.org, linuxppc-dev@...abs.org
CC:	mikey@...ling.org, james.hogan@...tec.com, avagin@...nvz.org,
	Paul.Clothier@...tec.com, peterz@...radead.org, palves@...hat.com,
	Ulrich Weigand <uweigand@...ibm.com>, shuahkh@....samsung.com,
	akpm@...ux-foundation.org, oleg@...hat.com, dhowells@...hat.com,
	kirjanov@...il.com, davej@...hat.com, tglx@...utronix.de,
	sukadev@...ux.vnet.ibm.com, davem@...emloft.net,
	sam.bobroff@....ibm.com
Subject: Re: [V6,1/9] elf: Add new powerpc specifc core note sections

On 01/01/2015 01:38 PM, Anshuman Khandual wrote:
>> > Also, we've noticed that the 'misc' regset contains registers from different ISA
>> > versions (dscr and ppr appear in ISA 2.05, tar is from 2.07). I'm not sure if
>> > there is a way to detect presence/validity of such registers, but perhaps it
>> > might be a good idea to separate registers from different ISAs in different
>> > regsets.
> Thats right, will use feature CPU_FTR_ARCH_207S (which checks whether we are v2.07
> compliant) to detect whether TAR register is available or not. 
> 

Need to correct something here. Run time detection of the presence of TAR register
through the feature bit CPU_FTR_ARCH_207S as I had mentioned before is not required.
Right now we take care of the compile time availability of the individual registers
the same way it is present on the thread struct. In the systems which do not have the
TAR register, thread.tar is always going to be 0 which is exactly the same value we
would get by excluding tar register copy after the run time detection of the feature.

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