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Message-ID: <alpine.DEB.2.11.1501151023140.5526@nanos>
Date: Thu, 15 Jan 2015 10:24:29 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Jiang Liu <jiang.liu@...ux.intel.com>
cc: Joerg Roedel <joro@...tes.org>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>, Yinghai Lu <yinghai@...nel.org>,
Borislav Petkov <bp@...en8.de>, x86@...nel.org,
David Rientjes <rientjes@...gle.com>,
HATAYAMA Daisuke <d.hatayama@...fujitsu.com>,
Jan Beulich <JBeulich@...e.com>,
Richard Weinberger <richard@....at>,
Oren Twaig <oren@...lemp.com>, Tony Luck <tony.luck@...el.com>,
linux-kernel@...r.kernel.org, iommu@...ts.linux-foundation.org,
"H. Peter Anvin" <hpa@...ux.intel.com>,
Ingo Molnar <mingo@...nel.org>
Subject: Re: [Patch v2 07/16] x86/apic: Refine enable_IR_x2apic() and related
functions
On Wed, 7 Jan 2015, Jiang Liu wrote:
> Refine enable_IR_x2apic() and related functions for better readability.
>
> It also changes the way to handle IR in XAPIC mode when enabling X2APIC.
> Previously it just skips X2APIC initialization without checking max CPU
> APIC ID in system, which may cause problem if system has CPU with APIC
> ID bigger than 255. So treat IR in XAPIC mode as same as IR is disabled
> when enabling CPU X2APIC.
Please don't do that. This wants to be two patches:
1) reordering the code
2) changing the operation
I've split it already, so no need to resend.
Thanks,
tglx
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