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Message-ID: <20150119104240.GE11835@e104818-lin.cambridge.arm.com>
Date: Mon, 19 Jan 2015 10:42:40 +0000
From: Catalin Marinas <catalin.marinas@....com>
To: Hanjun Guo <hanjun.guo@...aro.org>
Cc: "Rafael J. Wysocki" <rjw@...ysocki.net>,
Olof Johansson <olof@...om.net>, Arnd Bergmann <arnd@...db.de>,
Mark Rutland <Mark.Rutland@....com>,
"grant.likely@...aro.org" <grant.likely@...aro.org>,
Will Deacon <Will.Deacon@....com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@....com>,
"graeme.gregory@...aro.org" <graeme.gregory@...aro.org>,
Sudeep Holla <Sudeep.Holla@....com>,
"jcm@...hat.com" <jcm@...hat.com>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <Marc.Zyngier@....com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>,
Robert Richter <rric@...nel.org>,
Randy Dunlap <rdunlap@...radead.org>,
Charles Garcia-Tobin <Charles.Garcia-Tobin@....com>,
"phoenix.liyi@...wei.com" <phoenix.liyi@...wei.com>,
Timur Tabi <timur@...eaurora.org>,
"suravee.suthikulpanit@....com" <suravee.suthikulpanit@....com>,
"wangyijing@...wei.com" <wangyijing@...wei.com>,
"linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linaro-acpi@...ts.linaro.org" <linaro-acpi@...ts.linaro.org>
Subject: Re: [PATCH v7 06/17] ARM64 / ACPI: Make PCI optional for ACPI on
ARM64
On Sun, Jan 18, 2015 at 06:25:53AM +0000, Hanjun Guo wrote:
> On 2015年01月16日 17:49, Catalin Marinas wrote:
> > On Wed, Jan 14, 2015 at 03:04:54PM +0000, Hanjun Guo wrote:
> >> --- a/arch/arm64/kernel/pci.c
> >> +++ b/arch/arm64/kernel/pci.c
> >> @@ -10,6 +10,7 @@
> >> *
> >> */
> >>
> >> +#include <linux/acpi.h>
> >> #include <linux/init.h>
> >> #include <linux/io.h>
> >> #include <linux/kernel.h>
> >> @@ -68,3 +69,30 @@ void pci_bus_assign_domain_nr(struct pci_bus *bus, struct device *parent)
> >> bus->domain_nr = domain;
> >> }
> >> #endif
> >> +
> >> +/*
> >> + * raw_pci_read/write - Platform-specific PCI config space access.
> >> + *
> >> + * Default empty implementation. Replace with an architecture-specific setup
> >> + * routine, if necessary.
> >> + */
> >> +int raw_pci_read(unsigned int domain, unsigned int bus,
> >> + unsigned int devfn, int reg, int len, u32 *val)
> >> +{
> >> + return -EINVAL;
> >> +}
> >> +
> >> +int raw_pci_write(unsigned int domain, unsigned int bus,
> >> + unsigned int devfn, int reg, int len, u32 val)
> >> +{
> >> + return -EINVAL;
> >> +}
> >> +
> >> +#ifdef CONFIG_ACPI
> >> +/* Root bridge scanning */
> >> +struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
> >> +{
> >> + /* TODO: Should be revisited when implementing PCI on ACPI */
> >> + return NULL;
> >> +}
> >> +#endif
[...]
> > When PCI is enabled and the above functions are compiled in, do they
> > need to return any useful data or just -EINVAL. Are they ever called?
>
> They will be called if PCI root bridge is defined in DSDT, should I
> print some warning message before it is implemented?
My point: do they need to return real data when a PCI root bridge is
defined in DSDT or you always expect them to always return some -E*? Can
you explain why?
--
Catalin
--
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