lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Mon, 19 Jan 2015 08:00:39 -0800
From:	Mike Turquette <mturquette@...aro.org>
To:	"pi-cheng.chen" <pi-cheng.chen@...aro.org>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	"Viresh Kumar" <viresh.kumar@...aro.org>,
	"Matthias Brugger" <matthias.bgg@...il.com>,
	"Thomas Petazzoni" <thomas.petazzoni@...e-electrons.com>
Cc:	"pi-cheng.chen" <pi-cheng.chen@...aro.org>,
	linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linaro-kernel@...ts.linaro.org,
	"Eddie Huang" <eddie.huang@...iatek.com>,
	"Yingjoe Chen" <yingjoe.chen@...iatek.com>
Subject: Re: [PATCH 2/2] cpufreq: add cpufreq driver for Mediatek MT8173 SoC

Quoting pi-cheng.chen (2015-01-09 01:54:51)
> diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c
> new file mode 100644
> index 0000000..b578c10
> --- /dev/null
> +++ b/drivers/cpufreq/mt8173-cpufreq.c
> @@ -0,0 +1,459 @@

Hello Pi-Cheng,

<snip>

> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/cpufreq.h>
> +#include <linux/cpufreq-dt.h>
> +#include <linux/cpumask.h>
> +#include <linux/slab.h>
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>

I'll echo what Viresh said here. CPUfreq drivers should typically be
clock consumers and only require clk.h, not clk-provider.h. More on that
below.

<snip>

> +static void cpuclk_mux_set(int cluster, u32 sel)
> +{
> +       u32 val;
> +       u32 mask = 0x3;
> +
> +       if (cluster == BIG_CLUSTER) {
> +               mask <<= 2;
> +               sel <<= 2;
> +       }
> +
> +       spin_lock(&lock);
> +
> +       val = readl(clk_mux_regs);
> +       val = (val & ~mask) | sel;
> +       writel(val, clk_mux_regs);
> +
> +       spin_unlock(&lock);
> +}

Is cpuclk a mux that is represented in the MT8173 clock driver? It looks
like a clock that belong to the clock driver, but this cpufreq driver is
writing to that register directly.

<snip>

> +static int mt8173_cpufreq_dvfs_info_init(void)
> +{

<snip>

> +       mainpll = __clk_lookup("mainpll");
> +       if (!mainpll) {
> +               pr_err("failed to get mainpll clk\n");
> +               ret = -ENOENT;
> +               goto dvfs_info_release;
> +       }
> +       mainpll_freq = clk_get_rate(mainpll);

This is definitely bad. Why not use clk_get() here? __clk_lookup should
not be exposed to clock consumer drivers (and I hope to get rid of it
completely some day).

Regards,
Mike
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ