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Message-Id: <1422029330-10971-8-git-send-email-ricardo.ribalda@gmail.com>
Date: Fri, 23 Jan 2015 17:08:39 +0100
From: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
To: Mark Brown <broonie@...nel.org>,
Michal Simek <michal.simek@...inx.com>,
Sören Brinkmann <soren.brinkmann@...inx.com>,
linux-spi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Cc: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
Subject: [PATCH 07/18] spi/xilinx: Use cached value of register
The control register has not changed since the previous access.
Therefore we can use the cached value and safe one bus access.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@...il.com>
---
drivers/spi/spi-xilinx.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
index 978fbdd..3f8450d 100644
--- a/drivers/spi/spi-xilinx.c
+++ b/drivers/spi/spi-xilinx.c
@@ -271,7 +271,6 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
* transmitter while the Isr refills the transmit register/FIFO,
* or make sure it is stopped if we're done.
*/
- cr = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
xspi->write_fn(cr | XSPI_CR_TRANS_INHIBIT,
xspi->regs + XSPI_CR_OFFSET);
--
2.1.4
--
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