| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <1422265068-22974-1-git-send-email-wenyou.yang@atmel.com>
Date: Mon, 26 Jan 2015 17:37:48 +0800
From: Wenyou Yang <wenyou.yang@...el.com>
To: <nicolas.ferre@...el.com>, <linux@....linux.org.uk>
CC: <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<alexandre.belloni@...e-electrons.com>,
<sylvain.rochet@...secur.com>, <peda@...ntia.se>,
<wenyou.yang@...el.com>
Subject: [PATCH v2 01/12] pm: at91: pm_slowclock: improve reliability of suspend/resume
From: Sylvain Rochet <sylvain.rochet@...secur.com>
Assume USB PLL and PLL B are already stopped before entering sleep mode,
print a warning if this isn't the case.
Removed timeout on XTAL, PLL lock and Master Clock Ready, hang if
something went wrong instead of continuing in unknown condition. There
is not much we can do if a PLL lock never ends, we are running in SRAM
and we will not be able to connect back the sdram or ddram in order to
be able to fire up a message or just panic.
As a bonus, not decounting the timeout register in slow clock mode
reduce cumulated suspend time and resume time from ~17ms to ~15ms.
Signed-off-by: Sylvain Rochet <sylvain.rochet@...secur.com>
---
arch/arm/mach-at91/pm.c | 12 +++++++
arch/arm/mach-at91/pm_slowclock.S | 62 ++-----------------------------------
2 files changed, 15 insertions(+), 59 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 87c1fd8..5dd4e41 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -98,6 +98,18 @@ static int at91_pm_verify_clocks(void)
}
}
+ /* Drivers should have previously suspended USB PLL */
+ if (at91_pmc_read(AT91_CKGR_UCKR) & AT91_PMC_UPLLEN) {
+ pr_err("AT91: PM - Suspend-to-RAM with USB PLL running\n");
+ return 0;
+ }
+
+ /* Drivers should have previously suspended PLL B */
+ if (at91_pmc_read(AT91_PMC_SR) & AT91_PMC_LOCKB) {
+ pr_err("AT91: PM - Suspend-to-RAM with PLL B running\n");
+ return 0;
+ }
+
return 1;
}
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 556151e..e2bfaf5 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -25,11 +25,6 @@
*/
#undef SLOWDOWN_MASTER_CLOCK
-#define MCKRDY_TIMEOUT 1000
-#define MOSCRDY_TIMEOUT 1000
-#define PLLALOCK_TIMEOUT 1000
-#define PLLBLOCK_TIMEOUT 1000
-
pmc .req r0
sdramc .req r1
ramc1 .req r2
@@ -41,56 +36,27 @@ tmp2 .req r5
* Wait until master clock is ready (after switching master clock source)
*/
.macro wait_mckrdy
- mov tmp2, #MCKRDY_TIMEOUT
-1: sub tmp2, tmp2, #1
- cmp tmp2, #0
- beq 2f
- ldr tmp1, [pmc, #AT91_PMC_SR]
+1: ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_MCKRDY
beq 1b
-2:
.endm
/*
* Wait until master oscillator has stabilized.
*/
.macro wait_moscrdy
- mov tmp2, #MOSCRDY_TIMEOUT
-1: sub tmp2, tmp2, #1
- cmp tmp2, #0
- beq 2f
- ldr tmp1, [pmc, #AT91_PMC_SR]
+1: ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_MOSCS
beq 1b
-2:
.endm
/*
* Wait until PLLA has locked.
*/
.macro wait_pllalock
- mov tmp2, #PLLALOCK_TIMEOUT
-1: sub tmp2, tmp2, #1
- cmp tmp2, #0
- beq 2f
- ldr tmp1, [pmc, #AT91_PMC_SR]
+1: ldr tmp1, [pmc, #AT91_PMC_SR]
tst tmp1, #AT91_PMC_LOCKA
beq 1b
-2:
- .endm
-
-/*
- * Wait until PLLB has locked.
- */
- .macro wait_pllblock
- mov tmp2, #PLLBLOCK_TIMEOUT
-1: sub tmp2, tmp2, #1
- cmp tmp2, #0
- beq 2f
- ldr tmp1, [pmc, #AT91_PMC_SR]
- tst tmp1, #AT91_PMC_LOCKB
- beq 1b
-2:
.endm
.text
@@ -198,13 +164,6 @@ sdr_sr_done:
orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
str tmp1, [pmc, #AT91_CKGR_PLLAR]
- /* Save PLLB setting and disable it */
- ldr tmp1, [pmc, #AT91_CKGR_PLLBR]
- str tmp1, .saved_pllbr
-
- mov tmp1, #AT91_PMC_PLLCOUNT
- str tmp1, [pmc, #AT91_CKGR_PLLBR]
-
/* Turn off the main oscillator */
ldr tmp1, [pmc, #AT91_CKGR_MOR]
bic tmp1, tmp1, #AT91_PMC_MOSCEN
@@ -220,18 +179,6 @@ sdr_sr_done:
wait_moscrdy
- /* Restore PLLB setting */
- ldr tmp1, .saved_pllbr
- str tmp1, [pmc, #AT91_CKGR_PLLBR]
-
- tst tmp1, #(AT91_PMC_MUL & 0xff0000)
- bne 1f
- tst tmp1, #(AT91_PMC_MUL & ~0xff0000)
- beq 2f
-1:
- wait_pllblock
-2:
-
/* Restore PLLA setting */
ldr tmp1, .saved_pllar
str tmp1, [pmc, #AT91_CKGR_PLLAR]
@@ -310,9 +257,6 @@ ram_restored:
.saved_pllar:
.word 0
-.saved_pllbr:
- .word 0
-
.saved_sam9_lpr:
.word 0
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists