linux-kernel - Re: [PATCH v3] ARM: zynq: DT: Add USB to device tree

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Message-ID: <c65880cef67945ebaf61306febc1349b@BN1BFFO11FD010.protection.gbl>
Date:	Mon, 26 Jan 2015 07:50:22 -0800
From:	Sören Brinkmann <soren.brinkmann@...inx.com>
To:	Andreas Färber <afaerber@...e.de>
CC:	<monstr@...str.eu>, Michal Simek <michal.simek@...inx.com>,
	<devicetree@...r.kernel.org>,
	Peter Crosthwaite <peter.crosthwaite@...inx.com>,
	Arnd Bergmann <arnd@...db.de>, <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	Ola Jeppson <ola@...pteva.com>
Subject: Re: [PATCH v3] ARM: zynq: DT: Add USB to device tree

On Mon, 2015-01-26 at 10:35AM +0100, Andreas Färber wrote:
> Am 26.01.2015 um 09:33 schrieb Andreas Färber:
> > Am 26.01.2015 um 09:23 schrieb Michal Simek:
> >> On 01/26/2015 09:19 AM, Andreas Färber wrote:
> >>> And if I apply it to my -next based tree, adding corresponding nodes to
> >>> zynq-parallella.dts, I get repeatedly:
> >>>
> >>> [  +0,012242] ci_hdrc ci_hdrc.0: no of_node; not parsing pinctrl DT
> >>> [  +0,000157] ci_hdrc ci_hdrc.0: ChipIdea HDRC found, lpm: 0; cap:
> >>> f090e100 op: f090e140
> >>> [  +0,000081] platform ci_hdrc.0: Driver ci_hdrc requests probe deferral
> >>> [  +0,005360] ci_hdrc ci_hdrc.1: no of_node; not parsing pinctrl DT
> >>> [  +0,000120] ci_hdrc ci_hdrc.1: ChipIdea HDRC found, lpm: 0; cap:
> >>> f0910100 op: f0910140
> >>> [  +0,001810] platform ci_hdrc.1: Driver ci_hdrc requests probe deferral
> >>>
> >>> Am I missing any other patches or config options?
> >>> (I do notice that the pinctrl v3 patch that got merged has a trivial bug
> >>> for usb0, for which I'll send a patch later on.)
> >>
> >> Why is it deferred? Is it because of pinmuxing stuff?
> > 
> > No, happened without as well.
> > 
> > Looking at a different place in dmesg, I spot this:
> > 
> > [  +0,003988] usb_phy_generic phy0: GPIO lookup for consumer reset-gpios
> > [  +0,000012] usb_phy_generic phy0: using device tree for GPIO lookup
> > [  +0,000015] of_get_named_gpiod_flags: can't parse 'reset-gpios-gpios'
> > property
> >  of node '/phy0[0]'
> > [  +0,000013] of_get_named_gpiod_flags: can't parse 'reset-gpios-gpio'
> > property
> > of node '/phy0[0]'
> > [  +0,000010] usb_phy_generic phy0: using lookup tables for GPIO lookup
> > [  +0,000153] usb_phy_generic phy0: lookup for GPIO reset-gpios failed
> > [  +0,000012] usb_phy_generic phy0: Error requesting RESET GPIO
> > [  +0,004360] usb_phy_generic: probe of phy0 failed with error -2
> > [  +0,004991] usb_phy_generic phy1: GPIO lookup for consumer reset-gpios
> > [  +0,000012] usb_phy_generic phy1: using device tree for GPIO lookup
> > [  +0,000013] of_get_named_gpiod_flags: can't parse 'reset-gpios-gpios'
> > property
> >  of node '/phy1[0]'
> > [  +0,000013] of_get_named_gpiod_flags: can't parse 'reset-gpios-gpio'
> > property of node '/phy1[0]'
> > [  +0,000010] usb_phy_generic phy1: using lookup tables for GPIO lookup
> > [  +0,000012] usb_phy_generic phy1: lookup for GPIO reset-gpios failed
> > [  +0,000011] usb_phy_generic phy1: Error requesting RESET GPIO
> > [  +0,004337] usb_phy_generic: probe of phy1 failed with error -2
> > 
> > So, I guess the chipidea driver is deferring because the phys want a
> > property that neither me nor you are specifying? Would that be the two
> > MDIO pins 52 and 53 that would need to be specified?
> 
> Erm, scratch that last question - wrong PHY. Trying it resolved the
> above phy errors but not the original problem. And so does an empty one:
> 
> @@ -99,11 +100,13 @@
> 
>         usb_phy0: phy0 {
>                 compatible = "usb-nop-xceiv";
> +               reset-gpios = <>;
>                 #phy-cells = <0>;
>         };
> 
>         usb_phy1: phy1 {
>                 compatible = "usb-nop-xceiv";
> +               reset-gpios = <>;
>                 #phy-cells = <0>;
>         };
>  };
> 
> In my manuals and notes I can't find any GPIO being used as reset for
> the USB PHYs. Any thoughts appreciated.

Such a connection is optional. The platform might rely on its reset
circuit, though it might not work for warm reboots.
I haven't looked at parallela docs, but if there is a schematic
available, that should tell you if/what is connected to the PHY reset
pin.

	Soren
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