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Date:	Wed, 28 Jan 2015 11:25:52 +0000
From:	Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To:	Wenyou Yang <wenyou.yang@...el.com>
Cc:	"nicolas.ferre@...el.com" <nicolas.ferre@...el.com>,
	"linux@....linux.org.uk" <linux@....linux.org.uk>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"alexandre.belloni@...e-electrons.com" 
	<alexandre.belloni@...e-electrons.com>,
	"sylvain.rochet@...secur.com" <sylvain.rochet@...secur.com>,
	"peda@...ntia.se" <peda@...ntia.se>,
	"Patrice.VILCHEZ@...el.com" <Patrice.VILCHEZ@...el.com>
Subject: Re: [PATCH 2/7] pm: at91: pm_suspend: add the WFI support for ARMv7

On Mon, Jan 26, 2015 at 10:06:01AM +0000, Wenyou Yang wrote:

Commit log please.

> Signed-off-by: Wenyou Yang <wenyou.yang@...el.com>
> ---
>  arch/arm/mach-at91/pm_suspend.S |   54 ++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 53 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
> index 122a3f1..e796722 100644
> --- a/arch/arm/mach-at91/pm_suspend.S
> +++ b/arch/arm/mach-at91/pm_suspend.S
> @@ -53,6 +53,58 @@ mode	.req	r6
>  	beq	1b
>  	.endm
>  
> +/*
> + * Put the processor to enter the WFI state
> + */
> +	.macro _do_wfi

You will have to explain why you need this, really.

> +
> +#if defined(CONFIG_CPU_V7)
> +	/*
> +	 * Execute an ISB instruction to flush the pipeline to ensure
> +	 * that all of operations have beem completed.

s/beem/been

> +	 */
> +	isb
> +
> +	/*
> +	 * Execute an ISB instruction to ensure that all of the
> +	 * CP15 register changes have been committed.
> +	 */
> +	dsb

This is a dsb not an isb.

> +	dmb

You have to explain why you need every single one of these barriers,
otherwise I am NAKing this patch.

> +
> +	/* Disable the processor's clock */
> +	mov	tmp1, #AT91_PMC_PCK
> +	str	tmp1, [pmc, #AT91_PMC_SCDR]
> +
> +	/* Execute a WFI instruction */
> +	wfi	@ Wait For Interrupt

This one looks ok :)

> +
> +	/*
> +	 * CPU can specualatively prefetch the instructions
> +	 * so add NOPs after WFI. Sixteen NOPs as Cortex-A5 pipeline.

So what ? I suspect your issue is related to wfi completion on pending
IRQ. I would like to know the details that describe the issue you are
trying to solve here please.

> +	 */
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +	nop
> +#else
> +	mcr	p15, 0, tmp1, c7, c0, 4
> +#endif

Tell us what's the problem you have to solve, first, then we will see how
to fix it.

Thanks,
Lorenzo

> +
> +	.endm
> +
>  	.text
>  
>  /*
> @@ -181,7 +233,7 @@ sdr_sr_done:
>  
>  skip_disable_main_clock:
>  	/* Wait for interrupt */
> -	mcr	p15, 0, tmp1, c7, c0, 4
> +	_do_wfi
>  
>  	tst	mode, #AT91_PM_SLOW_CLOCK
>  	beq	skip_enable_main_clock
> -- 
> 1.7.9.5
> 
> --
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