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Message-ID: <1422458811.5293.56.camel@infradead.org>
Date:	Wed, 28 Jan 2015 15:26:51 +0000
From:	David Woodhouse <dwmw2@...radead.org>
To:	Feng Wu <feng.wu@...el.com>
Cc:	tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
	x86@...nel.org, gleb@...nel.org, pbonzini@...hat.com,
	joro@...tes.org, alex.williamson@...hat.com,
	jiang.liu@...ux.intel.com, eric.auger@...aro.org,
	linux-kernel@...r.kernel.org, iommu@...ts.linux-foundation.org,
	kvm@...r.kernel.org
Subject: Re: [v3 04/26] iommu, x86: Implement irq_set_vcpu_affinity for
 intel_ir_chip

On Fri, 2014-12-12 at 23:14 +0800, Feng Wu wrote:
> Implement irq_set_vcpu_affinity for intel_ir_chip.
> 
> Signed-off-by: Feng Wu <feng.wu@...el.com>
> Reviewed-by: Jiang Liu <jiang.liu@...ux.intel.com>

Acked-by: David.Woodhouse <David.Woodhouse@...el.com> assuming a
suitable answer to...

> +		vcpu_pi_info = (struct vcpu_data *)vcpu_info;
> +		memcpy(irte_pi, &ir_data->irte_entry, sizeof(struct irte));
> +
> +		irte_pi->urg = 0;
> +		irte_pi->vector = vcpu_pi_info->vector;
> +		irte_pi->pda_l = (vcpu_pi_info->pi_desc_addr >>
> +				 (32 - PDA_LOW_BIT)) & ~(-1UL << PDA_LOW_BIT);
> +		irte_pi->pda_h = (vcpu_pi_info->pi_desc_addr >> 32) &
> +				 ~(-1UL << PDA_HIGH_BIT);
> +
> +		irte_pi->__reserved_1 = 0;
> +		irte_pi->__reserved_2 = 0;
> +		irte_pi->__reserved_3 = 0;
> +		irte_pi->__reserved_4 = 0;

.... do we need a barrier here before we set this bit?

> +		irte_pi->pst = 1;
> +
> +		modify_irte(&ir_data->irq_2_iommu, (struct irte *)irte_pi);


-- 
dwmw2

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