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Message-ID: <20150128234937.20644.39714.stgit@dusk.lan>
Date:	Wed, 28 Jan 2015 16:49:37 -0700
From:	Paul Walmsley <paul@...an.com>
To:	unlisted-recipients:; (no To-header on input)
Cc:	Mark Rutland <mark.rutland@....com>,
	Alexandre Courbot <gnurou@...il.com>,
	Terje Bergström <tbergstrom@...dia.com>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Stephen Warren <swarren@...dotorg.org>,
	linux-kernel@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
	devicetree@...r.kernel.org,
	Thierry Reding <thierry.reding@...il.com>,
	dri-devel@...ts.freedesktop.org, Kumar Gala <galak@...eaurora.org>,
	linux-tegra@...r.kernel.org
Subject: [PATCH 03/24] Documentation: DT bindings: add more chip compatible
 strings for Tegra SOR


Add compatible strings for the SOR IP blocks present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@...an.com>
Cc: Thierry Reding <thierry.reding@...il.com>
Cc: "Terje Bergström" <tbergstrom@...dia.com>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Pawel Moll <pawel.moll@....com>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Ian Campbell <ijc+devicetree@...lion.org.uk>
Cc: Kumar Gala <galak@...eaurora.org>
Cc: Stephen Warren <swarren@...dotorg.org>
Cc: Alexandre Courbot <gnurou@...il.com>
Cc: dri-devel@...ts.freedesktop.org
Cc: linux-tegra@...r.kernel.org
Cc: devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
---
 .../bindings/gpu/nvidia,tegra20-host1x.txt         |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index 4c32ef0b7db8..0e828c00e7e4 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -198,6 +198,7 @@ of the following host1x client modules:
 
   Required properties:
   - compatible: "nvidia,tegra124-sor"
+    "nvidia,tegra132-sor" (not yet matched in the driver)
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain an entry for each entry in clock-names.
@@ -223,6 +224,7 @@ of the following host1x client modules:
 
 - dpaux: DisplayPort AUX interface
   - compatible: "nvidia,tegra124-dpaux"
+    "nvidia,tegra132-dpaux" (not yet matched in the driver)
   - reg: Physical base address and length of the controller's registers.
   - interrupts: The interrupt outputs from the controller.
   - clocks: Must contain an entry for each entry in clock-names.


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