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Message-ID: <5668659.y0L0n9UuOk@radagast>
Date: Thu, 29 Jan 2015 00:16:38 +0100
From: James Hogan <james.hogan@...tec.com>
To: linux-mips@...ux-mips.org
Cc: "Maciej W. Rozycki" <macro@...ux-mips.org>,
Ralf Baechle <ralf@...ux-mips.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] MIPS: Add arch CDMM definitions and probing
Hi Maciej,
On Wednesday 28 January 2015 23:09:17 Maciej W. Rozycki wrote:
> On Tue, 27 Jan 2015, James Hogan wrote:
>
> > diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
> > index 33866fce4d63..2086372fa72a 100644
> > --- a/arch/mips/include/asm/cpu.h
> > +++ b/arch/mips/include/asm/cpu.h
> > @@ -370,6 +370,7 @@ enum cpu_type_enum {
> > #define MIPS_CPU_RIXIEX 0x200000000ull /* CPU has unique exception codes for {Read, Execute}-Inhibit exceptions */
> > #define MIPS_CPU_MAAR 0x400000000ull /* MAAR(I) registers are present */
> > #define MIPS_CPU_FRE 0x800000000ull /* FRE & UFE bits implemented */
> > +#define MIPS_CPU_CDMM 0x10000000000ll /* CPU has Common Device Memory Map */
>
> Is it a typo here: 0x10000000000ll vs 0x1000000000ull?
Yes, it would appear so. Well spotted!
Thanks
James
>
> Maciej
>
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