linux-kernel - [3.13.y-ckt stable] Patch "pstore-ram: Fix hangs by using write-combine mappings" has been added to staging queue

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Message-Id: <1422483609-13900-1-git-send-email-kamal@canonical.com>
Date:	Wed, 28 Jan 2015 14:20:09 -0800
From:	Kamal Mostafa <kamal@...onical.com>
To:	Rob Herring <robherring2@...il.com>
Cc:	Arnd Bergmann <arnd@...db.de>,
	Anton Vorontsov <cbouatmailru@...il.com>,
	Colin Cross <ccross@...roid.com>,
	Olof Johansson <olof@...om.net>, linux-kernel@...r.kernel.org,
	Kees Cook <keescook@...omium.org>,
	Rob Herring <rob.herring@...xeda.com>,
	Tony Lindgren <tony@...mide.com>,
	Tony Luck <tony.luck@...el.com>,
	Kamal Mostafa <kamal@...onical.com>,
	kernel-team@...ts.ubuntu.com
Subject: [3.13.y-ckt stable] Patch "pstore-ram: Fix hangs by using write-combine mappings" has been added to staging queue

This is a note to let you know that I have just added a patch titled

    pstore-ram: Fix hangs by using write-combine mappings

to the linux-3.13.y-queue branch of the 3.13.y-ckt extended stable tree 
which can be found at:

 http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/heads/linux-3.13.y-queue

This patch is scheduled to be released in version 3.13.11-ckt15.

If you, or anyone else, feels it should not be added to this tree, please 
reply to this email.

For more information about the 3.13.y-ckt tree, see
https://wiki.ubuntu.com/Kernel/Dev/ExtendedStable

Thanks.
-Kamal

------

>From fb1b630b6dd09c791fc65d1228de6fd72610a85b Mon Sep 17 00:00:00 2001
From: Rob Herring <robherring2@...il.com>
Date: Fri, 12 Sep 2014 11:32:24 -0700
Subject: pstore-ram: Fix hangs by using write-combine mappings

commit 7ae9cb81933515dc7db1aa3c47ef7653717e3090 upstream.

Currently trying to use pstore on at least ARMs can hang as we're
mapping the peristent RAM with pgprot_noncached().

On ARMs, pgprot_noncached() will actually make the memory strongly
ordered, and as the atomic operations pstore uses are implementation
defined for strongly ordered memory, they may not work. So basically
atomic operations have undefined behavior on ARM for device or strongly
ordered memory types.

Let's fix the issue by using write-combine variants for mappings. This
corresponds to normal, non-cacheable memory on ARM. For many other
architectures, this change does not change the mapping type as by
default we have:

The reason why pgprot_noncached() was originaly used for pstore
is because Colin Cross <ccross@...roid.com> had observed lost
debug prints right before a device hanging write operation on some
systems. For the platforms supporting pgprot_noncached(), we can
add a an optional configuration option to support that. But let's
get pstore working first before adding new features.

Cc: Arnd Bergmann <arnd@...db.de>
Cc: Anton Vorontsov <cbouatmailru@...il.com>
Cc: Colin Cross <ccross@...roid.com>
Cc: Olof Johansson <olof@...om.net>
Cc: linux-kernel@...r.kernel.org
Acked-by: Kees Cook <keescook@...omium.org>
Signed-off-by: Rob Herring <rob.herring@...xeda.com>
[tony@...mide.com: updated description]
Signed-off-by: Tony Lindgren <tony@...mide.com>
Signed-off-by: Tony Luck <tony.luck@...el.com>

Signed-off-by: Kamal Mostafa <kamal@...onical.com>
---
 fs/pstore/ram_core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/pstore/ram_core.c b/fs/pstore/ram_core.c
index de272d4..d058428 100644
--- a/fs/pstore/ram_core.c
+++ b/fs/pstore/ram_core.c
@@ -392,7 +392,7 @@ static void *persistent_ram_vmap(phys_addr_t start, size_t size)
 	page_start = start - offset_in_page(start);
 	page_count = DIV_ROUND_UP(size + offset_in_page(start), PAGE_SIZE);

-	prot = pgprot_noncached(PAGE_KERNEL);
+	prot = pgprot_writecombine(PAGE_KERNEL);

 	pages = kmalloc(sizeof(struct page *) * page_count, GFP_KERNEL);
 	if (!pages) {
@@ -422,7 +422,7 @@ static void *persistent_ram_iomap(phys_addr_t start, size_t size)
 	buffer_start_add = buffer_start_add_locked;
 	buffer_size_add = buffer_size_add_locked;

-	return ioremap(start, size);
+	return ioremap_wc(start, size);
 }

 static int persistent_ram_buffer_map(phys_addr_t start, phys_addr_t size,
--
1.9.1

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