linux-kernel - [PATCH 13/24] Documentation: DT bindings: add more chip compatible strings for Tegra PMC

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Message-ID: <20150128234938.20644.51314.stgit@dusk.lan>
Date:	Wed, 28 Jan 2015 16:49:38 -0700
From:	Paul Walmsley <paul@...an.com>
To:	unlisted-recipients:; (no To-header on input)
Cc:	Mark Rutland <mark.rutland@....com>,
	Alexandre Courbot <gnurou@...il.com>,
	Pawel Moll <pawel.moll@....com>,
	Stephen Warren <swarren@...dotorg.org>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	Rob Herring <robh+dt@...nel.org>,
	Thierry Reding <thierry.reding@...il.com>,
	Paul Walmsley <pwalmsley@...dia.com>,
	Kumar Gala <galak@...eaurora.org>, linux-tegra@...r.kernel.org
Subject: [PATCH 13/24] Documentation: DT bindings: add more chip compatible
 strings for Tegra PMC


Add compatible strings for the PMC IP block present on several Tegra
chips.  The primary objective here is to avoid checkpatch warnings,
per:

http://marc.info/?l=linux-tegra&m=142201349727836&w=2

Signed-off-by: Paul Walmsley <paul@...an.com>
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Pawel Moll <pawel.moll@....com>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Ian Campbell <ijc+devicetree@...lion.org.uk>
Cc: Kumar Gala <galak@...eaurora.org>
Cc: Stephen Warren <swarren@...dotorg.org>
Cc: Thierry Reding <thierry.reding@...il.com>
Cc: Alexandre Courbot <gnurou@...il.com>
Cc: Paul Walmsley <pwalmsley@...dia.com>
Cc: devicetree@...r.kernel.org
Cc: linux-tegra@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
---
 .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      |    6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index 68ac65f82a1c..84bb31e7b778 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -6,7 +6,11 @@ modes. It provides power-gating controllers for SoC and CPU power-islands.
 
 Required properties:
 - name : Should be pmc
-- compatible : Should contain "nvidia,tegra<chip>-pmc".
+- compatible : "nvidia,tegra20-pmc"
+  "nvidia,tegra30-pmc"
+  "nvidia,tegra114-pmc"
+  "nvidia,tegra124-pmc"
+  "nvidia,tegra132-pmc" (not yet matched by the driver)
 - reg : Offset and length of the register set for the device
 - clocks : Must contain an entry for each entry in clock-names.
   See ../clocks/clock-bindings.txt for details.


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