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Message-ID: <alpine.DEB.2.10.1501281510190.3500@vshiva-Udesk>
Date: Wed, 28 Jan 2015 15:17:03 -0800 (PST)
From: Vikas Shivappa <vikas.shivappa@...el.com>
To: Paul Bolle <pebolle@...cali.nl>
cc: Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
linux-kernel@...r.kernel.org, vikas.shivappa@...el.com,
hpa@...or.com, tglx@...utronix.de, mingo@...nel.org, tj@...nel.org,
peterz@...radead.org, Matt Fleming <matt.fleming@...el.com>,
"Auld, Will" <will.auld@...el.com>
Subject: Re: [PATCH 1/6] x86/intel_cat: Intel Cache Allocation Technology
detection
On Wed, 28 Jan 2015, Paul Bolle wrote:
> Trivial nit below.
>
> On Tue, 2015-01-27 at 16:00 -0800, Vikas Shivappa wrote:
>> This patch adds support for the new Cache Allocation Technology (CAT)
>> feature found in future Intel Xeon processors. It includes CPUID
>> enumeration routines for CAT and new values to track CAT resources to
>> the cpuinfo_x86 structure.
>>
>> Cache Allocation Technology(CAT) provides a way for the Software
>> (OS/VMM) to restrict cache allocation to a defined 'subset' of cache
>> which may be overlapping with other 'subsets'. This feature is used
>> when allocating a line in cache ie when pulling new data into the cache.
>> The programming of the h/w is done via programming MSRs.
>>
>> More information about CAT be found in the Intel (R) x86 Architecture
>> Software Developer Manual, section 17.15.
>>
>> Signed-off-by: Vikas Shivappa <vikas.shivappa@...ux.intel.com>
>
> [...]
>
>> diff --git a/init/Kconfig b/init/Kconfig
>> index 9afb971..475b7b7 100644
>> --- a/init/Kconfig
>> +++ b/init/Kconfig
>> @@ -961,6 +961,17 @@ config CPUSETS
>>
>> Say N if unsure.
>>
>> +config CGROUP_CAT
>> + bool "Cache Allocation Technology cgroup subsystem"
>> + depends on X86_64
>
> Odd indentation. Just make it a tab (as I suppose the indentation of
> "help" already is).
ok , Will fix. Wish the checkpatch.pl caught that :)
Thanks,
Vikas
>
>> + help
>> + This option provides framework to allocate cache lines when
>> + applications fill cache.
>> + This can be used by users to configure how much cache that can be
>> + allocated to different PIDs.
>> +
>> + Say N if unsure.
>> +
>> config PROC_PID_CPUSET
>> bool "Include legacy /proc/<pid>/cpuset file"
>> depends on CPUSETS
>
>
> Paul Bolle
>
>
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