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Message-ID: <20150128191217.GF21293@sirena.org.uk>
Date:	Wed, 28 Jan 2015 19:12:17 +0000
From:	Mark Brown <broonie@...nel.org>
To:	Peter Rosin <peda@...ator.liu.se>
Cc:	alsa-devel@...a-project.org, Peter Rosin <peda@...ntia.se>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.de>,
	Liam Girdwood <lgirdwood@...il.com>,
	Clemens Ladisch <clemens@...isch.de>,
	Lars-Peter Clausen <lars@...afoo.de>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 3/7] ASoC: pcm512x: Change register default to match
 actual content after reset

On Wed, Jan 28, 2015 at 03:16:08PM +0100, Peter Rosin wrote:

> @@ -78,7 +78,7 @@ static const struct reg_default pcm512x_reg_defaults[] = {
>  	{ PCM512x_DIGITAL_VOLUME_2,  0x30 },
>  	{ PCM512x_DIGITAL_VOLUME_3,  0x30 },
>  	{ PCM512x_DIGITAL_MUTE_1,    0x22 },
> -	{ PCM512x_DIGITAL_MUTE_2,    0x00 },
> +	{ PCM512x_DIGITAL_MUTE_2,    0x02 },

The datasheet claims these have undefined values as reserved bits - what
would be a more robust change here would be to remove the register
default entirely so that we take the value the hardware has, giving
robustness against any hardware revisions.  Of course the device has
rather a lot of such reserved bits which is unfortunate.

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