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Message-Id: <20150203113927.B909E1A5F15@localhost.localdomain> Date: Tue, 3 Feb 2015 12:39:27 +0100 (CET) From: Christophe Leroy <christophe.leroy@....fr> To: Benjamin Herrenschmidt <benh@...nel.crashing.org>, Paul Mackerras <paulus@...ba.org>, scottwood@...escale.com CC: linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org, Joakim Tjernlund <joakim.tjernlund@...nsmode.se> Subject: [PATCH] powerpc32: rearrange instructions order in ip_fast_csum() On PPC_8xx, lwz has a 2 cycles latency, and branching also takes 2 cycles. As the size of the header is minimum 5 words, we can unroll the loop for the first words to reduce number of branching, and we can re-order the instructions to limit loading latency. Signed-off-by: Christophe Leroy <christophe.leroy@....fr> --- arch/powerpc/lib/checksum_32.S | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/lib/checksum_32.S b/arch/powerpc/lib/checksum_32.S index 6d67e05..5500704 100644 --- a/arch/powerpc/lib/checksum_32.S +++ b/arch/powerpc/lib/checksum_32.S @@ -26,13 +26,17 @@ _GLOBAL(ip_fast_csum) lwz r0,0(r3) lwzu r5,4(r3) - addic. r4,r4,-2 + addic. r4,r4,-4 addc r0,r0,r5 mtctr r4 blelr- -1: lwzu r4,4(r3) - adde r0,r0,r4 + lwzu r5,4(r3) + lwzu r4,4(r3) + adde r0,r0,r5 +1: adde r0,r0,r4 + lwzu r4,4(r3) bdnz 1b + adde r0,r0,r4 addze r0,r0 /* add in final carry */ rlwinm r3,r0,16,0,31 /* fold two halves together */ add r3,r0,r3 -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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