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Message-ID: <CANCZXo76KE7MCrFLAjx4tiFae5qd3Z7TEqiTCRJkeB8xgYtQgg@mail.gmail.com>
Date: Tue, 3 Feb 2015 19:00:39 +0600
From: Alexander Kuleshov <kuleshovmail@...il.com>
To: Oren Twaig <oren@...lemp.com>
Cc: linux-kernel@...r.kernel.org
Subject: Re: [x86_64] Question about early page tables initialization
Hello Oren,
Ah yes, absolutely right. I thought almost the same, just overlooked
that pdp is right after pml4 in memory.
Oren thank you for help.
2015-02-03 18:42 GMT+06:00 Oren Twaig <oren@...lemp.com>:
> Hi,
>
> This is the corresponding C code which can help you understand:
>
> u64 *pml4 = (u64*)pgtable;
> u64 pdp = pgtable + 0x1000;
> u64 pml4_entry = pdp | PTE_P | PTE_W | PTU; // present, write, userspace = 0x7
> pml4[0] = pml4_entry;
>
> The 0x1007 you see is just the calculation of the pml4_entry.
>
> Oren Twaig.
>
> On 02/03/2015 02:25 PM, Alex Kuleshov wrote:
>> Hello All,
>>
>> I have a question about page tables initialization in the
>> arch/x86/boot/compressed/head_64.S
>>
>> After we clear memory for page tables, there is code which
>> build PML4:
>>
>> leal pgtable + 0(%ebx), %edi
>> leal 0x1007(%edi), %eax
>> movl %eax, 0(%edi)
>>
>> Why there is offset 0x1007 instead just 0x7? 0x1007 is
>> 4k + 7bit (PML4E) flags as i understand correctly. But
>> why we skip first 4k here?
>>
>> Thank you.
>> --
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>
>
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