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Message-ID: <1423063323-19419-32-git-send-email-Zubair.Kakakhel@imgtec.com>
Date: Wed, 4 Feb 2015 15:22:00 +0000
From: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@...tec.com>
To: <linux-mips@...ux-mips.org>
CC: <devicetree@...r.kernel.org>, <linux-serial@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <Zubair.Kakakhel@...tec.com>,
<gregkh@...uxfoundation.org>, <mturquette@...aro.org>,
<sboyd@...eaurora.org>, <ralf@...ux-mips.org>, <jslaby@...e.cz>,
<tglx@...utronix.de>, <jason@...edaemon.net>, <lars@...afoo.de>,
<paul.burton@...tec.com>
Subject: [PATCH_V2 31/34] MIPS: add jz4780 Ingenic vendor ID
From: Paul Burton <paul.burton@...tec.com>
With the jz4780, Ingenic switched to use a different vendor ID in the
coprocessor 0 PRID register (whilst keeping the product ID & revision
the same as the jz4740 & jz4770...). Add a definition for the new
vendor ID & handle it in the same way as the older one.
Signed-off-by: Paul Burton <paul.burton@...tec.com>
Cc: Lars-Peter Clausen <lars@...afoo.de>
---
arch/mips/include/asm/cpu.h | 1 +
arch/mips/kernel/cpu-probe.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 33866fc..ab00d3b 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -43,6 +43,7 @@
#define PRID_COMP_NETLOGIC 0x0c0000
#define PRID_COMP_CAVIUM 0x0d0000
#define PRID_COMP_INGENIC 0xd00000
+#define PRID_COMP_INGENIC_4780 0xe10000
/*
* Assigned Processor ID (implementation) values for bits 15:8 of the PRId
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5342674..ca98c4a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1313,6 +1313,7 @@ void cpu_probe(void)
cpu_probe_cavium(c, cpu);
break;
case PRID_COMP_INGENIC:
+ case PRID_COMP_INGENIC_4780:
cpu_probe_ingenic(c, cpu);
break;
case PRID_COMP_NETLOGIC:
--
1.9.1
--
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