linux-kernel - [PATCH_V2 07/34] dt: interrupt-controller: Add ingenic,jz4740-intc binding doc

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Message-ID: <1423063323-19419-8-git-send-email-Zubair.Kakakhel@imgtec.com>
Date:	Wed, 4 Feb 2015 15:21:36 +0000
From:	Zubair Lutfullah Kakakhel <Zubair.Kakakhel@...tec.com>
To:	<linux-mips@...ux-mips.org>
CC:	<devicetree@...r.kernel.org>, <linux-serial@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <Zubair.Kakakhel@...tec.com>,
	<gregkh@...uxfoundation.org>, <mturquette@...aro.org>,
	<sboyd@...eaurora.org>, <ralf@...ux-mips.org>, <jslaby@...e.cz>,
	<tglx@...utronix.de>, <jason@...edaemon.net>, <lars@...afoo.de>,
	<paul.burton@...tec.com>
Subject: [PATCH_V2 07/34] dt: interrupt-controller: Add ingenic,jz4740-intc binding doc

From: Paul Burton <paul.burton@...tec.com>

Add binding documentation for the Ingenic jz4740 interrupt controller.

Signed-off-by: Paul Burton <paul.burton@...tec.com>
Cc: Lars-Peter Clausen <lars@...afoo.de>
Cc: devicetree@...r.kernel.org
---
 .../interrupt-controller/ingenic,jz4740-intc.txt   | 26 ++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt
new file mode 100644
index 0000000..5e7f4bb
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,jz4740-intc.txt
@@ -0,0 +1,26 @@
+Ingenic jz4740 SoC Interrupt Controller
+
+Required properties:
+
+- compatible : should be "ingenic,jz4740-intc" or "ingenic,jz4780-intc"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 1.
+- interrupts - Specifies the CPU interrupt the controller is connected to.
+
+Optional properties:
+- interrupt-parent: phandle of the CPU interrupt controller.
+
+Example:
+
+intc: intc@...01000 {
+	compatible = "ingenic,jz4740-intc";
+	reg = <0x10001000 0x14>;
+
+	interrupt-controller;
+	#interrupt-cells = <1>;
+
+	interrupt-parent = <&cpuintc>;
+	interrupts = <2>;
+};
-- 
1.9.1

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