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Message-ID: <20150204153756.GJ18758@lahna.fi.intel.com>
Date: Wed, 4 Feb 2015 17:37:56 +0200
From: Mika Westerberg <mika.westerberg@...ux.intel.com>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Jerome Blin <jerome.blin@...el.com>,
Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pinctrl: cherryview: Configure HiZ pins to be input when
requested as GPIOs
On Wed, Feb 04, 2015 at 10:01:49AM +0100, Linus Walleij wrote:
> On Thu, Jan 29, 2015 at 11:44 AM, Mika Westerberg
> <mika.westerberg@...ux.intel.com> wrote:
>
> > If the pin is in HiZ mode when it is requested as GPIO its value cannot be
> > read (it always returns 0). In order to cope with the Linux GPIO subsystem
> > where we do not have such state at all, turn the pin to be input instead.
> >
> > Reported-by: Jerome Blin <jerome.blin@...el.com>
> > Signed-off-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
>
> Patch applied.
Thanks.
> Since putting a pin into GPIO mode start poking around in essentially pin
> control registers, we may need to revisit the issue of the pin control subsystem
> not denying simultaneous use of a pin for a device muxing and GPIO.
> Maybe the "strict" setting forcing a pin to be either one or the other on
> a per-driver basis would enforce a better policy on this driver (and some
> others).
Yes, something like that sounds reasonable.
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