linux-kernel - Re: [v3,3/9] clk: samsung: exynos5433: Add clocks for CMU

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Message-id: <54D32A1A.8020202@samsung.com>
Date:	Thu, 05 Feb 2015 14:00:18 +0530
From:	Pankaj Dubey <pankaj.dubey@...sung.com>
To:	Chanwoo Choi <cw00.choi@...sung.com>, s.nawrocki@...sung.com,
	tomasz.figa@...il.com, mturquette@...aro.org
Cc:	kgene@...nel.org, inki.dae@...sung.com, chanho61.park@...sung.com,
	sw0312.kim@...sung.com, linux-samsung-soc@...r.kernel.org,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [v3,3/9] clk: samsung: exynos5433: Add clocks for CMU_MSCL domain

Hi Chanwoo,

On Tuesday 03 February 2015 05:43 AM, Chanwoo Choi wrote:
> This patch adds the mux/divider/gate clocks for CMU_MSCL domain which
> generates the clocks for M2M (Memory to Memory) scaler, JPEG IPs.
>
> Cc: Sylwester Nawrocki <s.nawrocki@...sung.com>
> Cc: Tomasz Figa <tomasz.figa@...il.com>
> Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
> Acked-by: Inki Dae <inki.dae@...sung.com>
>
> ---
> .../devicetree/bindings/clock/exynos5433-clock.txt |  20 +++
>   drivers/clk/samsung/clk-exynos5433.c               | 185 +++++++++++++++++++++
>   include/dt-bindings/clock/exynos5433.h             |  41 ++++-
>   3 files changed, 245 insertions(+), 1 deletion(-)
>

Verified clock tree, clock register and bitfield settings against UM.
Changes looks OK to me.

Reviewed-by: Pankaj Dubey <pankaj.dubey@...sung.com>

Thanks,
Pankaj Dubey
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