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Message-ID: <CAGTfZH1hMBgKCyTk+zmovOU5uFLpY-KHvJssXwFz8Zv1vXQEsw@mail.gmail.com>
Date: Thu, 5 Feb 2015 22:42:36 +0900
From: Chanwoo Choi <cwchoi00@...il.com>
To: Sylwester Nawrocki <s.nawrocki@...sung.com>
Cc: Pankaj Dubey <pankaj.dubey@...sung.com>,
Mike Turquette <mturquette@...aro.org>,
Tomasz Figa <tomasz.figa@...il.com>,
Kukjin Kim <kgene@...nel.org>,
"inki.dae@...sung.com" <inki.dae@...sung.com>,
"chanho61.park@...sung.com" <chanho61.park@...sung.com>,
Seung-Woo Kim <sw0312.kim@...sung.com>,
linux-samsung-soc <linux-samsung-soc@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
devicetree <devicetree@...r.kernel.org>
Subject: Re: [v3,1/9] clk: samsung: exynos5433: Add clocks for CMU_APOLLO domain
Hi Pankaj and Sylwester,
On Thu, Feb 5, 2015 at 6:56 PM, Sylwester Nawrocki
<s.nawrocki@...sung.com> wrote:
> On 05/02/15 08:44, Pankaj Dubey wrote:
>>> +static struct samsung_gate_clock apollo_gate_clks[] __initdata = {
>
>>> > +
>>> > + /* ENABLE_PCLK_APOLLO */
>>> > + GATE(CLK_PCLK_ASAPBMST_CSSYS_APOLLO, "pclk_asapbmst_cssys_apollo",
>>> > + "div_pclk_dbg_apollo", ENABLE_PCLK_APOLLO,
>>> > + 2, CLK_IGNORE_UNUSED, 0),
>>> > + GATE(CLK_PCLK_PMU_APOLLO, "pclk_pmu_apollo", "div_pclk_apollo",
>>> > + ENABLE_PCLK_APOLLO, 1, CLK_IGNORE_UNUSED, 0),
>>> > + GATE(CLK_PCLK_SYSREG_APOLLO, "pclk_pmu_sysreg_apollo",
>>
>> Isn't "pclk_pmu_sysreg_apollo" be named as "pclk_sysreg_apollo" to match
>> with UM?
You're right. It is my mistake.
>
> Sounds reasonable, Chanwoo, if you agree I'll squash following change
> to this patch before sending upstream:
I agree.
>
> diff --git a/drivers/clk/samsung/clk-exynos5433.c
> b/drivers/clk/samsung/clk-exynos5433.c
> index 7a024cd..387e3e3 100644
> --- a/drivers/clk/samsung/clk-exynos5433.c
> +++ b/drivers/clk/samsung/clk-exynos5433.c
> @@ -3656,7 +3656,7 @@ static struct samsung_gate_clock apollo_gate_clks[]
> __initdata = {
> 2, CLK_IGNORE_UNUSED, 0),
> GATE(CLK_PCLK_PMU_APOLLO, "pclk_pmu_apollo", "div_pclk_apollo",
> ENABLE_PCLK_APOLLO, 1, CLK_IGNORE_UNUSED, 0),
> - GATE(CLK_PCLK_SYSREG_APOLLO, "pclk_pmu_sysreg_apollo",
> + GATE(CLK_PCLK_SYSREG_APOLLO, "pclk_sysreg_apollo",
> "div_pclk_apollo", ENABLE_PCLK_APOLLO,
> 0, CLK_IGNORE_UNUSED, 0),
Best Regards,
Chanwoo Choi
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