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Message-ID: <20150205021357.GN4489@intel.com>
Date:	Wed, 4 Feb 2015 18:13:57 -0800
From:	Vinod Koul <vinod.koul@...el.com>
To:	Andrew Bresticker <abrestic@...omium.org>
Cc:	Dan Williams <dan.j.williams@...el.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Grant Likely <grant.likely@...aro.org>,
	James Hartley <james.hartley@...tec.com>,
	James Hogan <james.hogan@...tec.com>,
	Ezequiel Garcia <ezequiel.garcia@...tec.com>,
	Damien Horsley <Damien.Horsley@...tec.com>,
	Arnd Bergmann <arnd@...db.de>, dmaengine@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V3 0/2] dmaengine: Support for IMG MDC

On Thu, Dec 11, 2014 at 02:59:15PM -0800, Andrew Bresticker wrote:
> This series adds support for the IMG Multi-threaded DMA Controller (MDC)
> which is found on IMG SoCs.  Currently this driver only supports the
> variant found on the MIPS-based Pistachio SoC.
> 
> The MDC supports slave and memory-to-memory transfers on up to 32 channels.
> Requests from channels are handled by MDC threads.  Thread assignments are
> per-channel and are specified in the device-tree.
> 
> Tested on a platform based on the Pistachio SoC with additional patches.
> Support for Pistachio will be submitted later.  Slave DMA was tested
> with the recently submitted IMG SPFI driver [1] and memory-to-memory
> DMA was tested with the dmatest module.
> 
Applied, thanks

-- 
~Vinod

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