linux-kernel - Re: [PATCH v2] coresight: Adding coresight support for arm64 architecture

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Message-ID: <20150206185411.GB24099@arm.com>
Date:	Fri, 6 Feb 2015 18:54:11 +0000
From:	Will Deacon <will.deacon@....com>
To:	"mathieu.poirier@...aro.org" <mathieu.poirier@...aro.org>
Cc:	"linux@....linux.org.uk" <linux@....linux.org.uk>,
	Catalin Marinas <Catalin.Marinas@....com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] coresight: Adding coresight support for arm64
 architecture

On Tue, Feb 03, 2015 at 09:42:36PM +0000, mathieu.poirier@...aro.org wrote:
> From: Mathieu Poirier <mathieu.poirier@...aro.org>
> 
> Most CoreSight blocks are 64-bit ready.  As such move configuration
> entries from "arch/arm/Kconfig.config" to the driver's subdirectory
> and source the newly created Kconfig from architecture specific
> Kconfig.debug files.
> 
> Also fixing a couple of warnings generated by the 64-bit compiler.
> 
> Signed-off-by: Mathieu Poirier <mathieu.poirier@...aro.org>
> ---
> Changes for V2:
>  - Adding if CORESIGHT/endif block to Kconfig
>  - Using %zu to print size_t types 

Looks fine to me,

  Acked-by: Will Deacon <will.deacon@....com>

You should probably split up the conversion specifier fixes from the
kconfig restructuring, though.

Will

>  arch/arm/Kconfig.debug              | 55 +--------------------------------
>  arch/arm64/Kconfig.debug            |  2 ++
>  drivers/coresight/Kconfig           | 61 +++++++++++++++++++++++++++++++++++++
>  drivers/coresight/coresight-etb10.c |  4 +--
>  drivers/coresight/coresight-tmc.c   |  4 +--
>  5 files changed, 68 insertions(+), 58 deletions(-)
>  create mode 100644 drivers/coresight/Kconfig
> 
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
> index 5ddd4906f7a7..4fdbb0c012e6 100644
> --- a/arch/arm/Kconfig.debug
> +++ b/arch/arm/Kconfig.debug
> @@ -1478,59 +1478,6 @@ config DEBUG_SET_MODULE_RONX
>  	  against certain classes of kernel exploits.
>  	  If in doubt, say "N".
>  
> -menuconfig CORESIGHT
> -	bool "CoreSight Tracing Support"
> -	select ARM_AMBA
> -	help
> -	  This framework provides a kernel interface for the CoreSight debug
> -	  and trace drivers to register themselves with. It's intended to build
> -	  a topological view of the CoreSight components based on a DT
> -	  specification and configure the right serie of components when a
> -	  trace source gets enabled.
> -
> -if CORESIGHT
> -config CORESIGHT_LINKS_AND_SINKS
> -	bool "CoreSight Link and Sink drivers"
> -	help
> -	  This enables support for CoreSight link and sink drivers that are
> -	  responsible for transporting and collecting the trace data
> -	  respectively.  Link and sinks are dynamically aggregated with a trace
> -	  entity at run time to form a complete trace path.
> -
> -config CORESIGHT_LINK_AND_SINK_TMC
> -	bool "Coresight generic TMC driver"
> -	depends on CORESIGHT_LINKS_AND_SINKS
> -	help
> -	  This enables support for the Trace Memory Controller driver.  Depending
> -	  on its configuration the device can act as a link (embedded trace router
> -	  - ETR) or sink (embedded trace FIFO).  The driver complies with the
> -	  generic implementation of the component without special enhancement or
> -	  added features.
> -
> -config CORESIGHT_SINK_TPIU
> -	bool "Coresight generic TPIU driver"
> -	depends on CORESIGHT_LINKS_AND_SINKS
> -	help
> -	  This enables support for the Trace Port Interface Unit driver, responsible
> -	  for bridging the gap between the on-chip coresight components and a trace
> -	  port collection engine, typically connected to an external host for use
> -	  case capturing more traces than the on-board coresight memory can handle.
> -
> -config CORESIGHT_SINK_ETBV10
> -	bool "Coresight ETBv1.0 driver"
> -	depends on CORESIGHT_LINKS_AND_SINKS
> -	help
> -	  This enables support for the Embedded Trace Buffer version 1.0 driver
> -	  that complies with the generic implementation of the component without
> -	  special enhancement or added features.
> +source "drivers/coresight/Kconfig"
>  
> -config CORESIGHT_SOURCE_ETM3X
> -	bool "CoreSight Embedded Trace Macrocell 3.x driver"
> -	select CORESIGHT_LINKS_AND_SINKS
> -	help
> -	  This driver provides support for processor ETM3.x and PTM1.x modules,
> -	  which allows tracing the instructions that a processor is executing
> -	  This is primarily useful for instruction level tracing.  Depending
> -	  the ETM version data tracing may also be available.
> -endif
>  endmenu
> diff --git a/arch/arm64/Kconfig.debug b/arch/arm64/Kconfig.debug
> index 5fdd6dce8061..650e46056c55 100644
> --- a/arch/arm64/Kconfig.debug
> +++ b/arch/arm64/Kconfig.debug
> @@ -66,4 +66,6 @@ config DEBUG_SET_MODULE_RONX
>            against certain classes of kernel exploits.
>            If in doubt, say "N".
>  
> +source "drivers/coresight/Kconfig"
> +
>  endmenu
> diff --git a/drivers/coresight/Kconfig b/drivers/coresight/Kconfig
> new file mode 100644
> index 000000000000..fc1f1ae7a49d
> --- /dev/null
> +++ b/drivers/coresight/Kconfig
> @@ -0,0 +1,61 @@
> +#
> +# Coresight configuration
> +#
> +menuconfig CORESIGHT
> +	bool "CoreSight Tracing Support"
> +	select ARM_AMBA
> +	help
> +	  This framework provides a kernel interface for the CoreSight debug
> +	  and trace drivers to register themselves with. It's intended to build
> +	  a topological view of the CoreSight components based on a DT
> +	  specification and configure the right serie of components when a
> +	  trace source gets enabled.
> +
> +if CORESIGHT
> +config CORESIGHT_LINKS_AND_SINKS
> +	bool "CoreSight Link and Sink drivers"
> +	help
> +	  This enables support for CoreSight link and sink drivers that are
> +	  responsible for transporting and collecting the trace data
> +	  respectively.  Link and sinks are dynamically aggregated with a trace
> +	  entity at run time to form a complete trace path.
> +
> +config CORESIGHT_LINK_AND_SINK_TMC
> +	bool "Coresight generic TMC driver"
> +	depends on CORESIGHT_LINKS_AND_SINKS
> +	help
> +	  This enables support for the Trace Memory Controller driver.
> +	  Depending on its configuration the device can act as a link (embedded
> +	  trace router - ETR) or sink (embedded trace FIFO).  The driver
> +	  complies with the generic implementation of the component without
> +	  special enhancement or added features.
> +
> +config CORESIGHT_SINK_TPIU
> +	bool "Coresight generic TPIU driver"
> +	depends on CORESIGHT_LINKS_AND_SINKS
> +	help
> +	  This enables support for the Trace Port Interface Unit driver,
> +	  responsible for bridging the gap between the on-chip coresight
> +	  components and a trace for bridging the gap between the on-chip
> +	  coresight components and a trace port collection engine, typically
> +	  connected to an external host for use case capturing more traces than
> +	  the on-board coresight memory can handle.
> +
> +config CORESIGHT_SINK_ETBV10
> +	bool "Coresight ETBv1.0 driver"
> +	depends on CORESIGHT_LINKS_AND_SINKS
> +	help
> +	  This enables support for the Embedded Trace Buffer version 1.0 driver
> +	  that complies with the generic implementation of the component without
> +	  special enhancement or added features.
> +
> +config CORESIGHT_SOURCE_ETM3X
> +	bool "CoreSight Embedded Trace Macrocell 3.x driver"
> +	depends on !ARM64
> +	select CORESIGHT_LINKS_AND_SINKS
> +	help
> +	  This driver provides support for processor ETM3.x and PTM1.x modules,
> +	  which allows tracing the instructions that a processor is executing
> +	  This is primarily useful for instruction level tracing.  Depending
> +	  the ETM version data tracing may also be available.
> +endif
> diff --git a/drivers/coresight/coresight-etb10.c b/drivers/coresight/coresight-etb10.c
> index c9acd406f0d0..40049869aecd 100644
> --- a/drivers/coresight/coresight-etb10.c
> +++ b/drivers/coresight/coresight-etb10.c
> @@ -313,8 +313,8 @@ static ssize_t etb_read(struct file *file, char __user *data,
>  
>  	*ppos += len;
>  
> -	dev_dbg(drvdata->dev, "%s: %d bytes copied, %d bytes left\n",
> -		__func__, len, (int) (depth * 4 - *ppos));
> +	dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
> +		__func__, len, (int)(depth * 4 - *ppos));
>  	return len;
>  }
>  
> diff --git a/drivers/coresight/coresight-tmc.c b/drivers/coresight/coresight-tmc.c
> index 3ff232f9ddf7..030e097c4fb2 100644
> --- a/drivers/coresight/coresight-tmc.c
> +++ b/drivers/coresight/coresight-tmc.c
> @@ -533,8 +533,8 @@ static ssize_t tmc_read(struct file *file, char __user *data, size_t len,
>  
>  	*ppos += len;
>  
> -	dev_dbg(drvdata->dev, "%s: %d bytes copied, %d bytes left\n",
> -		__func__, len, (int) (drvdata->size - *ppos));
> +	dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
> +		__func__, len, (int)(drvdata->size - *ppos));
>  	return len;
>  }
>  
> -- 
> 1.9.1
> 
> 
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