linux-kernel - RE: [PATCH v4 0/7] clk: Add common clock support for Mediatek MT8135 and MT8173.

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Date:	Mon, 9 Feb 2015 03:05:41 +0000
From:	HenryC Chen (陳建豪) <HenryC.Chen@...iatek.com>
To:	Sascha Hauer <s.hauer@...gutronix.de>,
	Matthias Brugger <matthias.bgg@...il.com>
CC:	Rob Herring <robh+dt@...nel.org>,
	Mike Turquette <mturquette@...aro.org>,
	srv_heupstream <srv_heupstream@...iatek.com>,
	Sascha Hauer <kernel@...gutronix.de>,
	JamesJJ Liao (廖建智) <jamesjj.liao@...iatek.com>,
	Eddie Huang (黃智傑) <eddie.huang@...iatek.com>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	"Kumar Gala" <galak@...eaurora.org>,
	Russell King <linux@....linux.org.uk>,
	Catalin Marinas <catalin.marinas@....com>,
	Vladimir Murzin <vladimir.murzin@....com>,
	Ashwin Chaugule <ashwin.chaugule@...aro.org>,
	Yingjoe Chen (陳英洲) <Yingjoe.Chen@...iatek.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-mediatek@...ts.infradead.org" 
	<linux-mediatek@...ts.infradead.org>
Subject: RE: [PATCH v4 0/7] clk: Add common clock support for Mediatek
 MT8135 and MT8173.

Hi Sascha,

It's okay for me, thanks.

Henry

> -----Original Message-----
> From: Sascha Hauer [mailto:s.hauer@...gutronix.de]
> Sent: Friday, February 06, 2015 11:16 PM
> To: Matthias Brugger
> Cc: HenryC Chen (陳建豪); Rob Herring; Mike Turquette; srv_heupstream;
> Sascha Hauer; JamesJJ Liao (廖建智); Eddie Huang (黃智傑); Pawel Moll;
> Mark Rutland; Ian Campbell; Kumar Gala; Russell King; Catalin Marinas;
> Vladimir Murzin; Ashwin Chaugule; Yingjoe Chen (陳英洲);
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; linux-mediatek@...ts.infradead.org
> Subject: Re: [PATCH v4 0/7] clk: Add common clock support for Mediatek
> MT8135 and MT8173.
> 
> On Fri, Feb 06, 2015 at 03:20:35PM +0100, Matthias Brugger wrote:
> > > I don't really understand the "as part of the clk driver part". I
> > > now have replaced the devm_regmap_init_mmio with
> > > syscon_node_to_regmap in the pericfg / infracfg drivers. Is that
> all
> > > that you want or do you want me to move the source code to
> drivers/clk/mediatek?
> >
> > Yes, I propose to move the source code to drivers/clk/mediatek.
> > Please have a look on other clock drivers which implement the reset
> > controller, e.g. rockchip.
> 
> Ok, I'm halfway through implementing this, but let's have weekend first.
> 
> Henry, If you're fine with this I'll change your clock series according
> to Matthias suggestions.
> 
> Sascha
> 
> --
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