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Message-Id: <1423478845-2835-10-git-send-email-s.hauer@pengutronix.de>
Date: Mon, 9 Feb 2015 11:47:21 +0100
From: Sascha Hauer <s.hauer@...gutronix.de>
To: Matthias Brugger <matthias.bgg@...il.com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Rob Herring <robh+dt@...nel.org>,
Eddie Huang <eddie.huang@...iatek.com>,
Lee Jones <lee.jones@...aro.org>,
Yingjoe Chen (陳英洲)
<Yingjoe.Chen@...iatek.com>, Henry Chen <henryc.chen@...iatek.com>,
YH Chen (陳昱豪)
<yh.chen@...iatek.com>, kernel@...gutronix.de,
Mike Turquette <mturquette@...aro.org>,
James Liao <jamesjj.liao@...iatek.com>,
Sascha Hauer <s.hauer@...gutronix.de>
Subject: [PATCH 09/13] ARM: dts: mediatek: Enable clock support for Mediatek MT8135.
From: James Liao <jamesjj.liao@...iatek.com>
This patch adds MT8135 clock controllers into device tree.
Signed-off-by: James Liao <jamesjj.liao@...iatek.com>
Signed-off-by: Henry Chen <henryc.chen@...iatek.com>
Signed-off-by: Sascha Hauer <s.hauer@...gutronix.de>
---
arch/arm/boot/dts/mt8135.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
index 7d56a98..7cb5e84 100644
--- a/arch/arm/boot/dts/mt8135.dtsi
+++ b/arch/arm/boot/dts/mt8135.dtsi
@@ -12,6 +12,7 @@
* GNU General Public License for more details.
*/
+#include <dt-bindings/clock/mt8135-clk.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton64.dtsi"
@@ -86,6 +87,18 @@
clock-frequency = <32000>;
#clock-cells = <0>;
};
+
+ clk_null: clk_null {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ clk26m: clk26m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <26000000>;
+ };
};
soc {
@@ -94,6 +107,26 @@
compatible = "simple-bus";
ranges;
+ topckgen: topckgen@...00000 {
+ compatible = "mediatek,mt8135-topckgen";
+ reg = <0 0x10000000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
+ infracfg: infracfg@...01000 {
+ #reset-cells = <1>;
+ #clock-cells = <1>;
+ compatible = "mediatek,mt8135-infracfg", "syscon";
+ reg = <0 0x10001000 0 0x1000>;
+ };
+
+ pericfg: pericfg@...03000 {
+ #reset-cells = <1>;
+ #clock-cells = <1>;
+ compatible = "mediatek,mt8135-pericfg", "syscon";
+ reg = <0 0x10003000 0 0x1000>;
+ };
+
timer: timer@...08000 {
compatible = "mediatek,mt8135-timer",
"mediatek,mt6577-timer";
@@ -103,6 +136,12 @@
clock-names = "system-clk", "rtc-clk";
};
+ apmixedsys: apmixedsys@...09000 {
+ compatible = "mediatek,mt8135-apmixedsys";
+ reg = <0 0x10209000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+
gic: interrupt-controller@...11000 {
compatible = "arm,cortex-a15-gic";
interrupt-controller;
--
2.1.4
--
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