linux-kernel - Re: [Update] Re: [PATCH v3]PM/Sleep: Timer quiesce in freeze state

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Message-ID: <2271803.APdKPzvW0D@vostro.rjw.lan>
Date:	Mon, 09 Feb 2015 15:50:34 +0100
From:	"Rafael J. Wysocki" <rjw@...ysocki.net>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	"Li, Aubrey" <aubrey.li@...ux.intel.com>,
	"Brown, Len" <len.brown@...el.com>,
	Alan Cox <alan@...ux.intel.com>,
	LKML <linux-kernel@...r.kernel.org>,
	Linux PM list <linux-pm@...r.kernel.org>
Subject: Re: [Update] Re: [PATCH v3]PM/Sleep: Timer quiesce in freeze state

On Monday, February 09, 2015 10:49:26 AM Peter Zijlstra wrote:
> On Fri, Feb 06, 2015 at 11:36:12PM +0100, Rafael J. Wysocki wrote:
> > On Friday, February 06, 2015 07:29:22 PM Peter Zijlstra wrote:
> 
> > > > So I'm a wee bit confused; if we use an enter_freeze() state that keeps
> > > > interrupts disabled; who is going to call the freeze_wake() thing?
> > > 
> > > Ah, I think I see, so we wake up, keep the interrupt pending, re-enable
> > > the tick and time and everybody, then re-enable interrupts, take the
> > > interrupt and go around the idle loop to find we need a reschedule etc..
> > 
> > Exactly.
> 
> So x86 mwait can do this;

Which is a big enough target already as far as I'm concerned. :-)

> what other archs can 'sleep' and keep interrupts disabled?

The IO port based entry method on old(ish) x86 (like my Toshiba test-bed laptop)
keeps interrupts disabled too and that should cover ia64 (if they have ever
cared about anything more than C1 anyway).

There seem to be some entry methods that keep interrupts disabled on Power too.

> It looks like the ARM WFI thing wakes on pending interrupts and doesn't
> actually require interrupts to be enabled, so that too would work.

Yes, it would.  Moreover, for ARM that can do WFI only and nothing more than
that it would be much better than full suspend, because the whole CPU offline
dance we do then is a pure time loss for them.

The newfangled PSCI stuff should work too AFAICS.


-- 
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
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