[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <54DC5FCD.1070501@ti.com>
Date: Thu, 12 Feb 2015 10:09:49 +0200
From: Peter Ujfalusi <peter.ujfalusi@...com>
To: Urs Fässler <urs.fassler@...esatwork.ch>,
<perex@...ex.cz>, <tiwai@...e.de>
CC: <lgirdwood@...il.com>, <broonie@...nel.org>, <jsarha@...com>,
<misael.lopez@...com>, <alsa-devel@...a-project.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: davinci-mcasp: extension to use AHCLKX pin as external clock
source
On 02/10/2015 04:17 PM, Urs Fässler wrote:
> On 06.02.2015 12:50, Peter Ujfalusi wrote:
>> On 02/06/2015 11:22 AM, Urs Fässler wrote:
>>> The AHCLKX pin seems not to be supported as external source. The first
>>> patch is a general fix to allow external clock. The second allows you to
>>> select the AHCLKX pin as clock source.
>>>
>>> Patch built against v3.19-rc7
>>>
>>
>> I don't think this series is correct. You can just issue:
>> snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_IN);
>>
>> from the machine driver to select AHCLKX as input.
>>
> I checked everything and the source of the problem is, that on our
> hardware the bit clock of the codec is connected to AHCLKX.
Why would any HW designer do this???
Just to clarify this: the bitclock from codec is only connected to AHCLKX pin,
or is it also connected to the ACLKX pin?
The use of AHCLKX/R pin is _optional_ in McASP and it serves the purpose of
providing a way to have synchronized master clock for the codec and McASP.
ACLKX, AFSX and data pins are mandatory to be connected.
> According to the datasheet, AHCLKX is for the master clock only.
Yes, it is for the master clock to be used by both codec and McASP to avoid
clock drifting.
> On the other hand, it is possible to route a bitclock from AHCLKX to
>the subsystem (what I did with my patches).
Yes, it is possible, when McASP is master it can use the signal on AHCLKX pin
to generate the BCLK/FS.
> Now my question is, if it is even worth trying to bring such an option
> for the driver (use AHCLKX as bit clock in) upstream?
I don't want HW designers to get ideas from code - but if they did what I
think they did with your HW they certainly not going to bother checking TRM or
code...
But I think you can still get the setup working, if it is really like this:
McASP
AHCLKX <-- bitclock <-- codec
ACLKX (not connected while it should have been)
FSX <-- framsync <-- codec
In this case you want to configure the codec to be CBM_CFM and McASP as
CBS_CFM (we don't have this supported in the driver, but not a big deal to add).
And you call:
snd_soc_dai_set_sysclk(cpu_dai, 0, sysclk, SND_SOC_CLOCK_IN);
snd_soc_dai_set_clkdiv(cpu_dai, 1, 1);
You will have the codec providing the FS and driving the bitclock (connected
to wrong McASP pin). McASP will drive the bitclock using the AHCLKX as source
using divide by 1. McASP will not try to drive FS.
--
Péter
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists