| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <1423845781-7480-3-git-send-email-antoine.tenart@free-electrons.com>
Date: Fri, 13 Feb 2015 17:42:56 +0100
From: Antoine Tenart <antoine.tenart@...e-electrons.com>
To: sebastian.hesselbarth@...il.com, mturquette@...aro.org,
sboyd@...eaurora.org
Cc: Antoine Tenart <antoine.tenart@...e-electrons.com>,
zmxu@...vell.com, jszhang@...vell.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH 2/7] clk: convert clock gate to accept regmap
Rework the clk_gate helpers to either use an iomem base address or a
regmap.
Signed-off-by: Antoine Tenart <antoine.tenart@...e-electrons.com>
---
drivers/clk/clk-gate.c | 94 +++++++++++++++++++++++++++++++++-----------
include/linux/clk-provider.h | 12 ++++--
2 files changed, 80 insertions(+), 26 deletions(-)
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 51fd87fb7ba6..6cc27ebf6573 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -11,6 +11,7 @@
#include <linux/clk-provider.h>
#include <linux/module.h>
+#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/err.h>
@@ -50,15 +51,18 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
set ^= enable;
- if (gate->lock)
- spin_lock_irqsave(gate->lock, flags);
+ if (gate->reg_type == CLK_REG_TYPE_IOMEM && gate->reg.lock)
+ spin_lock_irqsave(gate->reg.lock, flags);
if (gate->flags & CLK_GATE_HIWORD_MASK) {
reg = BIT(gate->bit_idx + 16);
if (set)
reg |= BIT(gate->bit_idx);
} else {
- reg = clk_readl(gate->reg);
+ if (gate->reg_type == CLK_REG_TYPE_IOMEM)
+ reg = clk_readl(gate->reg.iomem);
+ else
+ regmap_read(gate->reg.regmap, gate->reg.offset, ®);
if (set)
reg |= BIT(gate->bit_idx);
@@ -66,10 +70,13 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
reg &= ~BIT(gate->bit_idx);
}
- clk_writel(reg, gate->reg);
+ if (gate->reg_type == CLK_REG_TYPE_IOMEM)
+ clk_writel(reg, gate->reg.iomem);
+ else
+ regmap_write(gate->reg.regmap, gate->reg.offset, reg);
- if (gate->lock)
- spin_unlock_irqrestore(gate->lock, flags);
+ if (gate->reg_type == CLK_REG_TYPE_IOMEM && gate->reg.lock)
+ spin_unlock_irqrestore(gate->reg.lock, flags);
}
static int clk_gate_enable(struct clk_hw *hw)
@@ -89,7 +96,10 @@ static int clk_gate_is_enabled(struct clk_hw *hw)
u32 reg;
struct clk_gate *gate = to_clk_gate(hw);
- reg = clk_readl(gate->reg);
+ if (gate->reg_type == CLK_REG_TYPE_IOMEM)
+ reg = clk_readl(gate->reg.iomem);
+ else
+ regmap_read(gate->reg.regmap, gate->reg.offset, ®);
/* if a set bit disables this clk, flip it before masking */
if (gate->flags & CLK_GATE_SET_TO_DISABLE)
@@ -107,21 +117,10 @@ const struct clk_ops clk_gate_ops = {
};
EXPORT_SYMBOL_GPL(clk_gate_ops);
-/**
- * clk_register_gate - register a gate clock with the clock framework
- * @dev: device that is registering this clock
- * @name: name of this clock
- * @parent_name: name of this clock's parent
- * @flags: framework-specific flags for this clock
- * @reg: register address to control gating of this clock
- * @bit_idx: which bit in the register controls gating of this clock
- * @clk_gate_flags: gate-specific flags for this clock
- * @lock: shared register lock for this clock
- */
-struct clk *clk_register_gate(struct device *dev, const char *name,
+struct clk *__clk_register_gate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
- void __iomem *reg, u8 bit_idx,
- u8 clk_gate_flags, spinlock_t *lock)
+ union clk_reg reg, enum clk_reg_type type, u8 bit_idx,
+ u8 clk_gate_flags)
{
struct clk_gate *gate;
struct clk *clk;
@@ -149,9 +148,9 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
/* struct clk_gate assignments */
gate->reg = reg;
+ gate->reg_type = type;
gate->bit_idx = bit_idx;
gate->flags = clk_gate_flags;
- gate->lock = lock;
gate->hw.init = &init;
clk = clk_register(dev, &gate->hw);
@@ -161,4 +160,55 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
return clk;
}
+
+/**
+ * clk_register_gate - register a gate clock with the clock framework
+ * @dev: device that is registering this clock
+ * @name: name of this clock
+ * @parent_name: name of this clock's parent
+ * @flags: framework-specific flags for this clock
+ * @reg: register address to control gating of this clock
+ * @bit_idx: which bit in the register controls gating of this clock
+ * @clk_gate_flags: gate-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+struct clk *clk_register_gate(struct device *dev, const char *name,
+ const char *parent_name, unsigned long flags,
+ void __iomem *reg, u8 bit_idx,
+ u8 clk_gate_flags, spinlock_t *lock)
+{
+ union clk_reg clk_reg;
+
+ clk_reg.iomem = reg;
+ clk_reg.lock = lock;
+
+ return __clk_register_gate(dev, name, parent_name, flags, clk_reg,
+ CLK_REG_TYPE_IOMEM, bit_idx, clk_gate_flags);
+}
EXPORT_SYMBOL_GPL(clk_register_gate);
+
+/**
+ * clk_register_gate_regmap - register a gate clock with the clock framework
+ * @dev: device that is registering this clock
+ * @name: name of this clock
+ * @parent_name: name of this clock's parent
+ * @flags: framework-specific flags for this clock
+ * @reg: regmap to control the gating of this clock
+ * @bit_idx: which bit in the register controls gating of this clock
+ * @clk_gate_flags: gate-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+struct clk *clk_register_gate_regmap(struct device *dev, const char *name,
+ const char *parent_name, unsigned long flags,
+ struct regmap *reg, unsigned int offset, u8 bit_idx,
+ u8 clk_gate_flags)
+{
+ union clk_reg clk_reg;
+
+ clk_reg.regmap = reg;
+ clk_reg.offset = offset;
+ return __clk_register_gate(dev, name, parent_name, flags, clk_reg,
+ CLK_REG_TYPE_REGMAP, bit_idx,
+ clk_gate_flags);
+}
+EXPORT_SYMBOL_GPL(clk_register_gate_regmap);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 3d2b9ab2130d..b3f7018960fb 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -297,10 +297,10 @@ enum clk_reg_type {
*/
struct clk_gate {
struct clk_hw hw;
- void __iomem *reg;
- u8 bit_idx;
- u8 flags;
- spinlock_t *lock;
+ union clk_reg reg;
+ enum clk_reg_type reg_type;
+ u8 bit_idx;
+ u8 flags;
};
#define CLK_GATE_SET_TO_DISABLE BIT(0)
@@ -311,6 +311,10 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
u8 clk_gate_flags, spinlock_t *lock);
+struct clk *clk_register_gate_regmap(struct device *dev, const char *name,
+ const char *parent_name, unsigned long flags,
+ struct regmap *reg, unsigned int offset, u8 bit_idx,
+ u8 clk_gate_flags);
struct clk_div_table {
unsigned int val;
--
2.3.0
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists