linux-kernel - Re: [PATCH 0/2] perf/x86: Add ability to sample TSC

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Date:	Thu, 19 Feb 2015 14:50:02 +0100
From:	Peter Zijlstra <peterz@...radead.org>
To:	Adrian Hunter <adrian.hunter@...el.com>
Cc:	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	linux-kernel@...r.kernel.org, David Ahern <dsahern@...il.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	Jiri Olsa <jolsa@...hat.com>,
	Namhyung Kim <namhyung@...il.com>,
	Paul Mackerras <paulus@...ba.org>,
	Stephane Eranian <eranian@...gle.com>,
	John Stultz <john.stultz@...aro.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Pawel Moll <pawel.moll@....com>,
	Steven Rostedt <rostedt@...dmis.org>,
	Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 0/2] perf/x86: Add ability to sample TSC

On Thu, Feb 19, 2015 at 02:11:08PM +0200, Adrian Hunter wrote:
> Hi
> 
> With the advent of switching perf_clock to CLOCK_MONOTONIC,
> it will not be possible to convert perf_clock directly to/from
> TSC. So add the ability to sample TSC instead.

Well, you can, mostly. MONOTONIC is only affected by NTP slew rate
changes, not offset changes.

And NTP limits the slew rate to 500 PPM, so even if you would get a
slew change and then not update the userpage data for a second you'd be
maximally off by 0.0005 seconds.

And that is way below what the current perf clock guarantees on funny
hardware.

If you're really worried about this; we could maybe get John and Thomas
to allow us a callback on every slew change so we can update the
userpage data ASAP, much reducing the max error.

Say it takes a 10e5 cycles to update your userpage, then you're never
further off than 50 cycles, which is below your ART multiplier.

Does that really matter? Also, if you have a stable crystal, the slew
rate change should be minimal and infrequent, never getting you close to
these numbers.

So no, I'm not convinced we need this.
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