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Date: Thu, 19 Feb 2015 15:24:01 -0500 (EST) From: David Miller <davem@...emloft.net> To: vbridger@...nsource.altera.com Cc: netdev@...r.kernel.org, nios2-dev@...ts.rocketboards.org, linux-kernel@...r.kernel.org, vbridger@...era.com, kailng@...era.com, dwesterg@...il.com Subject: Re: [PATCH net] net: eth: altera: Change access ports to mdio for all xMII applications From: Vince Bridgers <vbridger@...nsource.altera.com> Date: Thu, 12 Feb 2015 10:47:33 -0600 > Change use of Altera TSE's MDIO access from phy 0 registers to phy 1 > registers. This allows support for GMII, MII, RGMII, and SGMII > designs where the external PHY is always accesible through > Altera TSE's MDIO phy 1 registers and Altera's PCS is accessible > through MDIO phy 0 registers for SGMII applications. > > Signed-off-by: Vince Bridgers <vbridger@...nsource.altera.com> > Tested-by: Kai Lin Ng <kailng@...era.com> > Tested-by: Dalon Westergreen <dwesterg@...il.com> Applied to net-next. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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