linux-kernel - Re: [RESEND PATCH 2/2] arm: socfpga: Set share override bit of the l2 cache controller

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Message-ID: <20150220135744.GH8656@n2100.arm.linux.org.uk>
Date:	Fri, 20 Feb 2015 13:57:44 +0000
From:	Russell King - ARM Linux <linux@....linux.org.uk>
To:	Rob Herring <robherring2@...il.com>
Cc:	Dinh Nguyen <dinh.linux@...il.com>,
	Dinh Nguyen <dinguyen@...nsource.altera.com>,
	Arnd Bergmann <arnd@...db.de>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Olof Johansson <olof@...om.net>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [RESEND PATCH 2/2] arm: socfpga: Set share override bit of the
 l2 cache controller

On Fri, Feb 20, 2015 at 07:53:50AM -0600, Rob Herring wrote:
> On Fri, Feb 20, 2015 at 1:15 AM, Dinh Nguyen <dinh.linux@...il.com> wrote:
> > Can I ask what is your reasoning for doing this in the bootloader? It's
> > seems like this is such a nice mechanism to do it here.
> 
> Primarily, this register is secure only and we try to avoid secure
> mode setup in the kernel.
> 
> Russell also has had a patch to do this generically in his patch queue
> forever. If we want this in the kernel, then we should apply that.

I discarded it.  In general, we want boot loaders or firmware to
configure the basic properties of the caches, rather than having the
kernel do it for exactly the reasons you say above.

Yes, there are some cache features which can only be enabled in
combination with CPU features, and those the kernel _has_ to know
about, but the basic setup should be done outside the kernel.

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