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Message-ID: <54EBB439.3040303@zytor.com>
Date: Mon, 23 Feb 2015 15:14:01 -0800
From: "H. Peter Anvin" <hpa@...or.com>
To: ross.zwisler@...ux.intel.com, hpa@...ux.intel.com,
linux-kernel@...r.kernel.org, torvalds@...ux-foundation.org,
bp@...e.de, mingo@...nel.org, tglx@...utronix.de,
linux-tip-commits@...r.kernel.org
Subject: Re: [tip:x86/asm] x86/asm: Add support for the pcommit instruction
On 02/20/2015 02:31 AM, tip-bot for Ross Zwisler wrote:
>
> This function shows how to properly use clwb/clflushopt/clflush
> and pcommit with appropriate fencing:
>
> void flush_and_commit_buffer(void *vaddr, unsigned int size)
> {
> void *vend = vaddr + size - 1;
>
> for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
> clwb(vaddr);
>
> /* Flush any possible final partial cacheline */
> clwb(vend);
>
> /*
> * sfence to order clwb/clflushopt/clflush cache flushes
> * mfence via mb() also works
> */
> wmb();
>
> /* pcommit and the required sfence for ordering */
> pcommit_sfence();
> }
>
That may cause the same line to be flushed twice. I would suggest,
instead, also removing the arithmetic on void *:
Totally untested, yadda yadda...
void flush_and_commit_buffer(void *vaddr, unsigned int size)
{
unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
char *vend = (char *)vaddr + size;
char *p;
for (p = (char *)((unsigned long)vaddr & ~clflush_mask);
p < vend; p += boot_cpu_data.x86_clflush_size)
clwb(vaddr);
/*
* sfence to order clwb/clflushopt/clflush cache flushes
* mfence via mb() also works
*/
wmb();
/* pcommit and the required sfence for ordering */
pcommit_sfence();
}
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