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Message-ID: <20150224223840.GA21310@qualcomm.com>
Date: Tue, 24 Feb 2015 16:38:40 -0600
From: Andy Gross <agross@...eaurora.org>
To: Stanimir Varbanov <stanimir.varbanov@...aro.org>
Cc: Mark Brown <broonie@...nel.org>, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-spi@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Kumar Gala <galak@...eaurora.org>,
Sagar Dharia <sdharia@...eaurora.org>,
Daniel Sneddon <dsneddon@...eaurora.org>
Subject: Re: [PATCH v2] spi: qup: Add DMA capabilities
On Tue, Feb 24, 2015 at 06:08:54PM +0200, Stanimir Varbanov wrote:
<snip>
>
> yes, there is a potential race between atomic_inc and dma callback. I
> reordered these calls to save few checks, and now it returns to me.
>
> I imagine few options here:
>
> - reorder the dmaengine calls and atomic operations, i.e.
> call atomic_inc for rx and tx channels before corresponding
> dmaengine_submit and dmaengine_issue_pending.
>
> - have two different dma callbacks and two completions and waiting for
> the two.
This is probably the better solution. The only thing you'll have to take into
consideration is that you may not have a RX DMA transactions.
>
> - manage to receive only one dma callback, i.e. the last transfer in
> case of presence of the rx_buf and tx_buf at the same time.
You use separate channels for the RX and TX, so as long as you have separate
callbacks, it shouldnt be a problem.
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Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
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