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Message-ID: <CAD=FV=WxjQXQpRDNj8pOrcQdAgiQKrJSM1Upf=npjNEpbBLcPg@mail.gmail.com>
Date: Wed, 25 Feb 2015 13:05:13 -0800
From: Doug Anderson <dianders@...omium.org>
To: Alim Akhtar <alim.akhtar@...il.com>
Cc: Addy Ke <addy.ke@...k-chips.com>,
Jaehoon Chung <jh80.chung@...sung.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
Olof Johansson <olof@...om.net>,
Andrzej Hajda <a.hajda@...sung.com>,
Heiko Stübner <heiko@...ech.de>,
Eddie Cai <cf@...k-chips.com>, lintao <lintao@...k-chips.com>,
Tao Huang <huangtao@...k-chips.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
Javier Martinez Canillas <javier.martinez@...labora.co.uk>
Subject: Re: [PATCH v4 1/3] mmc: dw_mmc: update clock after host reach a
stable voltage
Alim,
On Tue, Feb 24, 2015 at 11:52 PM, Alim Akhtar <alim.akhtar@...il.com> wrote:
>>> This looks a HACK to me.
>>> If stabilizing host voltage regulator is the problem, can you try out
>>> below patch, and see if this resolve your issue?
>>
>> Actually, IMHO Alim's patch is more of a hack than Addy's. There's
>> already a 10ms delay between "power up" and "power on" in the MMC core
>> in mmc_power_up() state. That delay is commented as:
>>
> Well, my suggestion (adding 5ms in switch_volatge) was based on DW_MMC
> databook (V2.41a) section "7.4.1.2 Voltage switch Normal Scenario"
> step #7 which says:" After the 5ms timer expires, the host voltage
> regulator is stable".
So all of that should be handled by the core. Just reading the DW_MMC
databook can be confusing because they don't differentiate between
what's in the SDMMC spec and what's DW_MMC specific.
Check out mmc_set_signal_voltage(), specifically:
* During a signal voltage level switch, the clock must be gated
* for 5 ms according to the SD spec
-Doug
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