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Message-ID: <alpine.DEB.2.10.1502251058110.3409@vshiva-Udesk>
Date:	Thu, 26 Feb 2015 10:19:42 -0800 (PST)
From:	Vikas Shivappa <vikas.shivappa@...el.com>
To:	Borislav Petkov <bp@...en8.de>
cc:	Vikas Shivappa <vikas.shivappa@...el.com>,
	Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
	linux-kernel@...r.kernel.org, matt.fleming@...el.com,
	hpa@...or.com, tglx@...utronix.de, mingo@...nel.org, tj@...nel.org,
	peterz@...radead.org, will.auld@...el.com, dave.hansen@...el.com,
	andi.kleen@...el.com, tony.luck@...el.com, kanaka.d.juvva@...el.com
Subject: Re: [PATCH 1/7] x86/intel_rdt: Intel Cache Allocation Technology
 detection



On Wed, 25 Feb 2015, Borislav Petkov wrote:

> On Tue, Feb 24, 2015 at 04:42:10PM -0800, Vikas Shivappa wrote:
>>>> +
>>>> +	pr_info("cbmlength:%u,Closs: %u\n", cbm_len, maxid);
>>>
>>> This text message needs to be much more user-friendly if it is going out
>>> to the console unconditionally.
>>>
>>
>> bit mask lengh:  number of CLOSids: ? . it should print with the module name
>> as well which should help understand what it is for.
>
> Right, if I haven't read the SDM on RDT, I still don't understand what
> those mean. What is the need for that message at all, what is it telling
> me?
>
> Can you show an example from a machine with RDT and explain what it is
> good for?


This would be an indication that the System support RDT. On a system with RDT 
would see a print.

intel_rdt: cbmlength: xx , CLOss:xx

This is documented in the RDT documentation that is added in the patch and the 
code also mentiones the Intel SDM section which details the feature. The RDT 
is expected to be used by advanced users atlest the ones who would use the 
cgroup RDT interface , knows about the class of service , bit mask etc.. The use 
cases are also documented in the RDT document  in cgroups/rdt.txt (the last 
patch in this series)

>
>>>> +config CGROUP_RDT
>>>> +	bool "Resource Director Technology cgroup subsystem"
>>>> +	depends on X86_64
>>>
>>> depends on X86_64 && CPU_SUP_INTEL
>>>
>>> Also, this should probably also depend on CGROUP-something or so
>>> AFAICT...
>>
>> This is with in the if CGROUPS
>
> Right, but you still need the CPU_SUP_INTEL dependency as !Intel x86
> doesn't need that code built.

Will add this dependency..

>
> Thanks.
>
> -- 
> Regards/Gruss,
>    Boris.
>
> ECO tip #101: Trim your mails when you reply.
> --
>
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