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Message-ID: <CACzj_yUmzshtU7--gqn9XTLMae8cKfjgVPRa9bEEEv04A8DBBA@mail.gmail.com>
Date:	Fri, 27 Feb 2015 16:56:06 +0800
From:	Wincy Van <fanwenyi0529@...il.com>
To:	Yong Wang <yong.y.wang@...ux.intel.com>
Cc:	Paolo Bonzini <pbonzini@...hat.com>,
	"gleb@...nel.org" <gleb@...nel.org>,
	"Zhang, Yang Z" <yang.z.zhang@...el.com>,
	Wanpeng Li <wanpeng.li@...ux.intel.com>,
	"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Jan Kiszka <jan.kiszka@....de>, mtosatti@...hat.com
Subject: Re: [PATCH resend v5 6/6] KVM: nVMX: Enable nested posted interrupt processing

On Sun, Feb 15, 2015 at 2:27 PM, Yong Wang <yong.y.wang@...ux.intel.com> wrote:
>
> Wincy, our QA found regressions with this patch that 64bit L2 linux guest
> fails to boot up when running nested kvm on kvm.
>
> Environment:
> ------------
> Host OS (ia32/ia32e/IA64):ia32e
> Guest OS (ia32/ia32e/IA64):ia32e
> Guest OS Type (Linux/Windows):Linux
> kvm.git Commit:6557bada461afeaa920a189fae2cff7c8fdce39f
> qemu.kvm Commit:5c697ae74170d43928cb185f5ac1a9058adcae0b
> Host Kernel Version:3.19.0-rc3
> Hardware:Ivytown_EP, Haswell_EP
>
>
> Bug detailed description:
> --------------------------
> create 64bit linux guest as L2 guest, the guest boot up fail
>
> note:
> 1. create a 32bit linux guest as L2 guest, the guest boots up fine.
> 2. create a 64bit windows guest as L2 guest, the guest boots up fine.
> 3. this should be a kernel bug:
> kvm       + qemu     = result
> 6557bada  + 5c697ae7 = bad
> 8fff5e37  + 5c697ae7 = good
>
> Reproduce steps:
> ----------------
> 1 create L1 guest:
> qemu-system-x86_64 -enable-kvm -m 8G -smp 4 -net nic,macaddr=00:12:31:34:51:31 -net tap,script=/etc/kvm/qemu-ifup nested-kvm.qcow -cpu host
>
> 2. create L2 guest
> qemu-system-x86_64 -enable-kvm -m 2G -smp 2 -net none rhel6u5.qcow
>
> Current result:
> ----------------
> create 64bit linux guest as L2 guest, the guest boots up fail
>
> Expected result:
> ----------------
> create 64bit linux guest as L2 guest, the guest boots up fine
>
> Please take a look.
>

Yong, according to the logs, I found that L1 may have disabled x2apic,
and the MSR_BITMAP field will be modified by following vmx_set_efer in
prepare_vmcs02.
So I think we can fix this issue by:

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index f7b20b4..f6e3457 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2168,7 +2168,10 @@ static void vmx_set_msr_bitmap(struct kvm_vcpu *vcpu)
 {
        unsigned long *msr_bitmap;

-       if (irqchip_in_kernel(vcpu->kvm) && apic_x2apic_mode(vcpu->arch.apic)) {
+       if (is_guest_mode(vcpu))
+               msr_bitmap = vmx_msr_bitmap_nested;
+       else if (irqchip_in_kernel(vcpu->kvm) &&
+               apic_x2apic_mode(vcpu->arch.apic)) {
                if (is_long_mode(vcpu))
                        msr_bitmap = vmx_msr_bitmap_longmode_x2apic;
                else


Thanks,
Wincy
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