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Message-ID: <CALmu+Sx5WJzzDSoueP+yhbyB359gpXwpZ1EgGCLrnPACAO=bMA@mail.gmail.com>
Date: Fri, 27 Feb 2015 21:40:45 -0800
From: Tolga Ceylan <tolga.ceylan@...il.com>
To: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Noralf Trønnes <noralf@...nnes.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
devel@...verdev.osuosl.org, linux-kernel@...r.kernel.org,
Tolga Ceylan <tolga.ceylan@...il.com>
Subject: Re: [PATCH 1/1] Staging: fbtft: fb_ssd1331: replaced C99 comments
with C89
On Fri, Feb 27, 2015 at 9:37 PM, Tolga Ceylan <tolga.ceylan@...il.com> wrote:
> Replaced C99 '//' comments with C89 '/**/'
>
> Signed-off-by: Tolga Ceylan <tolga.ceylan@...il.com>
> ---
> drivers/staging/fbtft/fb_ssd1331.c | 30 +++++++++++++++---------------
> 1 file changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/staging/fbtft/fb_ssd1331.c b/drivers/staging/fbtft/fb_ssd1331.c
> index da7464f..5cbd763 100644
> --- a/drivers/staging/fbtft/fb_ssd1331.c
> +++ b/drivers/staging/fbtft/fb_ssd1331.c
> @@ -29,24 +29,24 @@ static int init_display(struct fbtft_par *par)
>
> write_reg(par, 0xae); /* Display Off */
> write_reg(par, 0xa0, 0x70 | (par->bgr << 2)); /* Set Colour Depth */
> - write_reg(par, 0x72); // RGB colour
> + write_reg(par, 0x72); /* RGB colour */
> write_reg(par, 0xa1, 0x00); /* Set Display Start Line */
> write_reg(par, 0xa2, 0x00); /* Set Display Offset */
> write_reg(par, 0xa4); /* NORMALDISPLAY */
> - write_reg(par, 0xa8, 0x3f); // Set multiplex
> - write_reg(par, 0xad, 0x8e); // Set master
> - // write_reg(par, 0xb0, 0x0b); // Set power mode
> - write_reg(par, 0xb1, 0x31); // Precharge
> - write_reg(par, 0xb3, 0xf0); // Clock div
> - write_reg(par, 0x8a, 0x64); // Precharge A
> - write_reg(par, 0x8b, 0x78); // Precharge B
> - write_reg(par, 0x8c, 0x64); // Precharge C
> - write_reg(par, 0xbb, 0x3a); // Precharge level
> - write_reg(par, 0xbe, 0x3e); // vcomh
> - write_reg(par, 0x87, 0x06); // Master current
> - write_reg(par, 0x81, 0x91); // Contrast A
> - write_reg(par, 0x82, 0x50); // Contrast B
> - write_reg(par, 0x83, 0x7d); // Contrast C
> + write_reg(par, 0xa8, 0x3f); /* Set multiplex
> + write_reg(par, 0xad, 0x8e); /* Set master
> + /* write_reg(par, 0xb0, 0x0b); */ /* Set power mode */
> + write_reg(par, 0xb1, 0x31); /* Precharge */
> + write_reg(par, 0xb3, 0xf0); /* Clock div */
> + write_reg(par, 0x8a, 0x64); /* Precharge A */
> + write_reg(par, 0x8b, 0x78); /* Precharge B */
> + write_reg(par, 0x8c, 0x64); /* Precharge C */
> + write_reg(par, 0xbb, 0x3a); /* Precharge level */
> + write_reg(par, 0xbe, 0x3e); /* vcomh */
> + write_reg(par, 0x87, 0x06); /* Master current */
> + write_reg(par, 0x81, 0x91); /* Contrast A */
> + write_reg(par, 0x82, 0x50); /* Contrast B */
> + write_reg(par, 0x83, 0x7d); /* Contrast C */
> write_reg(par, 0xaf); /* Set Sleep Mode Display On */
>
> return 0;
> --
> 2.3.0
>
Apologies, please ignore this patch. It is faulty.
--
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