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Message-Id: <1425226007-2757-3-git-send-email-rvolkov@v1ros.org>
Date: Sun, 1 Mar 2015 19:06:47 +0300
From: Roman Volkov <rvolkov@...os.org>
To: Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Russell King <linux@....linux.org.uk>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Alexey Charkov <alchark@...il.com>,
Roman Volkov <rvolkov@...os.org>
Subject: [PATCH v3 2/2] dts: vt8500: Fix errors in SDHC node for WM8505
According to datasheet, the registers space of SDHC controller is 1Kb,
not '0x1000', the correct value should be '0x400'. Bracket interrupt
numbers individually per recommendations.
Signed-off-by: Roman Volkov <rvolkov@...os.org>
---
arch/arm/boot/dts/wm8505.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index a1a854b..e9ef539 100644
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -281,8 +281,8 @@
sdhc@...0a000 {
compatible = "wm,wm8505-sdhc";
- reg = <0xd800a000 0x1000>;
- interrupts = <20 21>;
+ reg = <0xd800a000 0x400>;
+ interrupts = <20>, <21>;
clocks = <&clksdhc>;
bus-width = <4>;
};
--
2.3.1
--
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