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Message-Id: <1425315442-29584-1-git-send-email-b.reynal@virtualopensystems.com>
Date:	Mon,  2 Mar 2015 17:57:22 +0100
From:	Baptiste Reynal <b.reynal@...tualopensystems.com>
To:	iommu@...ts.linux-foundation.org, kvmarm@...ts.cs.columbia.edu
Cc:	tech@...tualopensystems.com,
	Baptiste Reynal <b.reynal@...tualopensystems.com>,
	Will Deacon <will.deacon@....com>,
	Joerg Roedel <joro@...tes.org>,
	linux-arm-kernel@...ts.infradead.org (moderated list:ARM SMMU DRIVER),
	linux-kernel@...r.kernel.org (open list)
Subject: [PATCH 1/1] iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition

This patch is a fix to "iommu/arm-smmu: add support for iova_to_phys
through ATS1PR".
According to ARM documentation, translation registers are optional even
in SMMUv1, so ID0_S1TS needs to be checked to verify their presence.

Signed-off-by: Baptiste Reynal <b.reynal@...tualopensystems.com>
---
 drivers/iommu/arm-smmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index fc13dd5..d4beca4 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -1556,7 +1556,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
 		return -ENODEV;
 	}
 
-	if (smmu->version == 1 || (!(id & ID0_ATOSNS) && (id & ID0_S1TS))) {
+	if ((id & ID0_S1TS) && ((smmu->version == 1) || (id & ID0_ATOSNS))) {
 		smmu->features |= ARM_SMMU_FEAT_TRANS_OPS;
 		dev_notice(smmu->dev, "\taddress translation ops\n");
 	}
-- 
2.3.1

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