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Message-ID: <1425510939.17007.271.camel@misato.fc.hp.com>
Date:	Wed, 04 Mar 2015 16:15:39 -0700
From:	Toshi Kani <toshi.kani@...com>
To:	Ingo Molnar <mingo@...nel.org>
Cc:	akpm@...ux-foundation.org, hpa@...or.com, tglx@...utronix.de,
	mingo@...hat.com, arnd@...db.de, linux-mm@...ck.org,
	x86@...nel.org, linux-kernel@...r.kernel.org,
	dave.hansen@...el.com, Elliott@...com
Subject: Re: [PATCH v3 3/6] mm: Change ioremap to set up huge I/O mappings

On Wed, 2015-03-04 at 23:09 +0100, Ingo Molnar wrote:
> * Toshi Kani <toshi.kani@...com> wrote:
 :
> Hm, so I don't see where you set the proper x86 PAT table attributes 
> for the pmds.
> 
> MTRR's are basically a legacy mechanism, the proper way to set cache 
> attribute is PAT and I don't see where this generic code does that, 
> but I might be missing something?

It's done by x86 code, not by this generic code.  __ioremap_caller()
takes page_cache_mode and converts it to pgprot_t using the PAT table
attribute.  It then calls this generic func, ioremap_page_range().  When
creating a huge page mapping, pud_set_huge() and pmd_set_huge() handle
the relocation of the PAT bit.

Thanks,
-Toshi    

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