lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1425428519-12224-11-git-send-email-kwestfie@codeaurora.org>
Date:	Tue,  3 Mar 2015 16:21:59 -0800
From:	Kenneth Westfield <kwestfie@...eaurora.org>
To:	Mark Brown <broonie@...nel.org>, Takashi Iwai <tiwai@...e.de>,
	Liam Girdwood <lgirdwood@...il.com>,
	Banajit Goswami <bgoswami@...eaurora.org>,
	Patrick Lai <plai@...eaurora.org>,
	David Brown <davidb@...eaurora.org>,
	Bryan Huntsman <bryanh@...eaurora.org>,
	Greg KH <gregkh@...uxfoundation.org>
Cc:	Kenneth Westfield <kwestfie@...eaurora.org>,
	ALSA Mailing List <alsa-devel@...a-project.org>,
	MSM Mailing List <linux-arm-msm@...r.kernel.org>,
	Device Tree Mailing List <devicetree@...r.kernel.org>,
	Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: [Patch V7 10/10] ARM: dts: Model IPQ LPASS audio hardware

From: Kenneth Westfield <kwestfie@...eaurora.org>

Model the Qualcomm Technologies LPASS hardware for
the ipq806x SOC.

Signed-off-by: Kenneth Westfield <kwestfie@...eaurora.org>
Acked-by: Banajit Goswami <bgoswami@...eaurora.org>
---
 arch/arm/boot/dts/qcom-ipq8064.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index cb225dafe97cd83c9ae4cc19482ed55d4a71b8b3..8902d967463b3d9e6e02c6ec6518e392d8372050 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -2,6 +2,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
+#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 
 / {
@@ -96,6 +97,24 @@
 			cpu-offset = <0x80000>;
 		};
 
+		lpass@...00000 {
+			compatible = "qcom,lpass-cpu";
+			status = "disabled";
+			clocks = <&lcc AHBIX_CLK>,
+					<&lcc MI2S_OSR_CLK>,
+					<&lcc MI2S_BIT_CLK>;
+			clock-names = "ahbix-clk",
+					"mi2s-osr-clk",
+					"mi2s-bit-clk";
+			interrupts = <0 85 1>;
+			interrupt-names = "lpass-irq-lpaif";
+			reg = <0x28100000 0x10000>;
+			reg-names = "lpass-lpaif";
+			qcom,adsp {
+				status = "disabled";
+			};
+		};
+
 		acc0: clock-controller@...8000 {
 			compatible = "qcom,kpss-acc-v1";
 			reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
@@ -279,5 +298,12 @@
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
+
+		lcc: clock-controller@...00000 {
+			compatible = "qcom,lcc-ipq8064";
+			reg = <0x28000000 0x1000>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
 	};
 };
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ