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Message-ID: <CA+QbAV4J0iJi-2J3kQW1=3jLFvqbweFFKbOZ=UEgNVd_fBN1Yw@mail.gmail.com>
Date: Fri, 6 Mar 2015 10:26:00 -0800
From: Kallol Biswas <nucleodyne@...il.com>
To: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: 64 B burst transaction on PCIe core with CPU
Hi,
I am trying to test a memory device that does not have DMA engine
working yet.
The memory on the device can be accessed in multiples of 64 bytes.
The code below does 64 B burst write on PCIe bus.
int wcbytes[16];
dev->bar = ioremap_wc(pci_resource_start(pdev, 0), size);
for(i=0;i<16;i++) {
*(unsigned int *)(dev->bar+i*4) = wcbytes[i];
}
wmb();
Basically, I buildup writes and do a wmb(). It works.
How can I generate 64 B burst read on PCIe bus from CPU?
Kallol
NucleoDyne Systems, Inc.
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