linux-kernel - 64 B burst transaction on PCIe core with CPU

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Date:	Fri, 6 Mar 2015 10:26:00 -0800
From:	Kallol Biswas <nucleodyne@...il.com>
To:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: 64 B burst transaction on PCIe core with CPU

Hi,
   I am trying to test a memory device that does not have DMA engine
working yet.

The memory on the device can be accessed in multiples of 64 bytes.

The code below does 64 B burst write on PCIe bus.

int  wcbytes[16];

dev->bar = ioremap_wc(pci_resource_start(pdev, 0), size);

for(i=0;i<16;i++) {
            *(unsigned int *)(dev->bar+i*4) = wcbytes[i];
}
wmb();

Basically, I buildup writes and do a wmb(). It works.

How can I generate 64 B burst read on PCIe bus from CPU?

Kallol
NucleoDyne Systems, Inc.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/