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Message-ID: <CAK1hOcNz=UyphNJSxDN+RRi10DsNO5CgZ6e5rMsFp2TV0YmPTQ@mail.gmail.com>
Date: Mon, 9 Mar 2015 15:08:35 +0100
From: Denys Vlasenko <vda.linux@...glemail.com>
To: Andy Lutomirski <luto@...capital.net>
Cc: "H. Peter Anvin" <hpa@...or.com>,
Fengguang Wu <fengguang.wu@...el.com>, X86 ML <x86@...nel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Ingo Molnar <mingo@...nel.org>, LKP <lkp@...org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [x86/asm/entry] BUG: unable to handle kernel paging request
On Mon, Mar 9, 2015 at 3:00 PM, Andy Lutomirski <luto@...capital.net> wrote:
>> I'm preparing a patch which does this:
>>
>> btl $X86_EFLAGS_VM_BIT,PT_EFLAGS(%esp)
>> jc restore_nocheck # VM set, not it
>> testb $3,PT_CS(%esp)
>> jz restore_nocheck # CPL0, not it
>> # Note: we access PT_OLDSS only when we know it exists.
>> # If PT_CS is from CPL0, this can be not true.
>> testb $SEGMENT_TI_MASK,PT_OLDSS(%esp)
>> jnz ldt_ss # returning to user-space with LDT SS
>>
>> All three checks can run in parallel on an OOO CPU.
>> Most of the time, none of branches will be taken.
>
> Why do we need the VM check? Isn't CS == 0 in vm86 mode?
IF VM is set, then we are in vm86 mode, not in 16-bit protected mode
where ESPFIX thingy may be necessary. And also,
%ss register in vm86 does nit have LDT bit, thus that check would
not work properly anyway.
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