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Message-ID: <CALszF6AzrCH=OtJUppt0+SBAf+mKeNO8wL7oe7V3E7qk2DP4nA@mail.gmail.com>
Date: Tue, 10 Mar 2015 16:41:38 +0100
From: Maxime Coquelin <mcoquelin.stm32@...il.com>
To: Arnd Bergmann <arnd@...db.de>
Cc: Uwe Kleine-König
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Subject: Re: [PATCH v2 07/18] drivers: reset: Add STM32 reset driver
2015-03-10 16:02 GMT+01:00 Arnd Bergmann <arnd@...db.de>:
> On Friday 20 February 2015 19:01:06 Maxime Coquelin wrote:
>> +/* AHB1 */
>> +#define GPIOA_RESET 0
>> +#define GPIOB_RESET 1
>> +#define GPIOC_RESET 2
>> +#define GPIOD_RESET 3
>> +#define GPIOE_RESET 4
>> +#define GPIOF_RESET 5
>> +#define GPIOG_RESET 6
>> +#define GPIOH_RESET 7
>> +#define GPIOI_RESET 8
>> +#define GPIOJ_RESET 9
>> +#define GPIOK_RESET 10
>>
>
> As these are just the hardware numbers, it's better to not make them
> part of the binding at all. Instead, just document in the binding that
> one is supposed to pass the hardware number as the argument.
The reset controller is part of the RCC (Reset & Clock Controller) IP.
In this version, I only provided the reset registers to the reset
controller driver, but as per Andrea
>
> Arnd
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